Patents by Inventor Takeaki Asaeda
Takeaki Asaeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030086231Abstract: In a power conversion apparatus, a first switch is connected in series with a dc capacitor between P and N terminals of a dc circuit. The first switch is formed of a switched valve device and a diode connected in reverse parallel with each other. The switched valve device of the first switch and switched valve devices used in individual arms of a second power converter are voltage-driven switched valve devices. An on-gate voltage of the switched valve device of the first switch is made lower than an on-gate voltage of the switched valve devices of the second power converter.Type: ApplicationFiled: October 1, 2002Publication date: May 8, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Takeaki Asaeda, Hiroshi Masunaga
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Patent number: 6535406Abstract: In a gate control device for four self-arc extinction elements connected in series and two self-arc extinction elements connected in reverse parallel between the respective terminals of clamp diodes, individually, there is provided a PWM circuit that generates conduction control commands, and a gate control circuit including a delay circuit group that generates gate signals with respect to the respective self-arc extinction elements on the basis of respective conduction control commands. A pair of the self-arc extinction elements are rendered conductive at the same time, and another pair of the self-arc extinction elements are rendered conductive at the same time.Type: GrantFiled: March 11, 2002Date of Patent: March 18, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takeaki Asaeda, Hiroshi Masunaga
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Publication number: 20030048650Abstract: In a gate control device for self-arc extinction elements (T1) to (T4) and self-arc extinction elements (T5) and (T6) connected in reverse parallel between the respective both terminals of clamp diodes (D5) and (D6), individually, there are provided a PWM circuit (2) that generates conduction control commands (SP) and (SN), and a gate control circuit (3) including a delay circuit group that generates gate signals (ST1) to (ST6) with respect to the respective self-arc extinction elements on the basis of the respective conduction control commands. The self-arc extinction elements (T3) and (T5) are rendered conductive at the same time under control, and the self-arc extinction elements (T2) and (T6) are rendered conductive at the same time under control.Type: ApplicationFiled: March 11, 2002Publication date: March 13, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Takeaki Asaeda, Hiroshi Masunaga
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Patent number: 6479882Abstract: The current-limiting device 1 includes a silicon substrate 2 having surfaces opposite to each other, and two electrodes 3 deposited respectively on the opposite surfaces of the silicon substrate. The silicon substrate 2 is of a three-layered structure including an N− layer 4 of a low impurity density and an N+ layers 5 of a high impurity density formed respectively on opposite surfaces of the N− layer 4. The electrodes 3, are deposited on an outer surface of each of the N+ layers 5 remote from the N− layer 4. The constant current substantially flows in the current-limiting device 1 if the applied voltage is higher than a predetermined value.Type: GrantFiled: December 18, 2000Date of Patent: November 12, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yoshihiro Yamaguchi, Takeaki Asaeda, Katsumi Satoh, Noritoshi Hirano
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Publication number: 20020011647Abstract: The current-limiting device 1 includes a silicon substrate 2 having surfaces opposite to each other, and two electrodes 3 deposited respectively on the opposite surfaces of the silicon substrate. The silicon substrate 2 is of a three-layered structure including an N− layer 4 of a low impurity density and an N+ layers 5 of a high impurity density formed respectively on opposite surfaces of the N− layer 4. The electrodes 3, are deposited on an outer surface of each of the N+ layers 5 remote from the N− layer 4. The constant current substantially flows in the current-limiting device 1 if the applied voltage is higher than a predetermined value.Type: ApplicationFiled: December 18, 2000Publication date: January 31, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Yoshihiro Yamaguchi, Takeaki Asaeda, Katsumi Satoh, Noritoshi Hirano
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Patent number: 5886888Abstract: A voltage source type power converting apparatus having voltage source type power converter units and phase-shifting transformers. The transformers have either a common multiple-phase primary winding or a group of parallel connected multiple-phase primary windings, either of which being connected in parallel or series to a multiple-phase AC system. The transformer further include a group of multiple-phase secondary windings with phase differences with respect to each other and which are connected to voltage source type power converter units. The voltage source type power converter units are operated with the phase differences. Accordingly, the construction of the multiplexing phase-shifting transformer is simple, and fundamental electric variables can be controlled by a simple phase controlling operation. In addition, a higher harmonic defect of the AC system can be reduced, and the DC voltage can be easily raised.Type: GrantFiled: April 26, 1996Date of Patent: March 23, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masahiko Akamatsu, Shinzo Tamai, Fuminori Nakamura, Shotaro Murakami, Tomohiko Aritsuka, Takeaki Asaeda
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Patent number: 4906860Abstract: A control device for an active filter according to the present invention comprises a ROM circuit for producing output signals sin .theta. and cos .theta. from a phase signal generated from a PLL circuit, a first multiplier for multiplying a load current detection signal by the output signals sin .theta. and cos .theta., a sample-holding circuit for integrating the output signal of the first multiplier and holding the integrated value to produce peak values of valid current component and invalid current component for constituting the basic wave component of the load current, a second multiplier for multiplying the peak values by the output signals sin .theta. and cos .theta., and a PWM control circuit for PWM-controlling the input current of the active filter with a harmonic current signal obtained as the difference between a basic wave current signal of the load current during a period of next one period of the single-phase a.c.Type: GrantFiled: May 5, 1989Date of Patent: March 6, 1990Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Takeaki Asaeda
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Patent number: 4710862Abstract: An inverter comprises a pair of reactors connected in series between a positive arm element and a negative arm element, snubbers each connected in parallel to respective arm elements, and a feedback circuit for transferring electrical energy stored in the snubbers back to the d.c. power source. The feedback circuit includes a self turn-off switching device which is controlled to become conductive during a certain period in correspondence to the on-off operation of the arm elements so that energy stored in the snubbers is fed back to the d.c. power source through a current transformer and a rectifying circuit during the on-state of the device.Type: GrantFiled: April 8, 1985Date of Patent: December 1, 1987Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Takeaki Asaeda
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Patent number: 4639850Abstract: A power conversion device such as an inverter using as bridge arm elements self-extinguishing-type switching elements for converting D-C input power into A-C load power. Snubbers, each including a capacitor and a diode in series, are connected in parallel with the switching elements. A discharging circuit, having a diode is connected across the diodes of the snubbers, and a power source feedback circuit, including a current transformer, are employed to return the current discharged from the snubbers to the input power source, thereby enhancing conversion efficiency.Type: GrantFiled: September 20, 1984Date of Patent: January 27, 1987Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takeaki Asaeda, Toru Nakamura, Takashi Yutani