Abstract: A semiconductor device including a pillar formed in a highly reliable manner and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a semiconductor chip including an internal circuit area and an I/O area disposed outside the internal circuit area, a package substrate coupled in a flip-chip manner to the semiconductor chip, and an electrically conductive pillar disposed between the semiconductor chip and the package substrate such that the electrically conductive pillar is located over two or more wirings in an uppermost wiring layer of the semiconductor chip and such that the two or more wirings are coupled together via the electrically conductive pillar.

Abstract: A semiconductor device provided on a semiconductor substrate having a cell placing area disposed on a semiconductor substrate, the cell placing area including a plurality of basic cells supplied with power from a local power supply line, a global power supply line to supply power to the local power supply line, at least one switch cell having a terminal electrically connected to the global power supply line, another terminal electrically connected to the local power supply line and a switch to turn on and off power supply from the global power supply line to the local power supply line and a repeater circuit disposed in the cell placing area, the repeater circuit supplied with power from the global power supply line without interposing the switch.

Abstract: A semiconductor device provided on a semiconductor substrate having a cell placing area disposed on a semiconductor substrate, the cell placing area including a plurality of basic cells supplied with power from a local power supply line, a global power supply line to supply power to the local power supply line, at least one switch cell having a terminal electrically connected to the global power supply line, another terminal electrically connected to the local power supply line and a switch to turn on and off power supply from the global power supply line to the local power supply line and a repeater circuit disposed in the cell placing area, the repeater circuit supplied with power from the global power supply line without interposing the switch.

Abstract: Automatic routing device which automatically conducts placement and routing of integrated circuits on an integrated circuit chip, including a wire capacitance calculating unit, a degree of wire congestion calculating unit and a routing checking unit for determining whether routing of a desired net is possible or not based on a degree of wire congestion at each global routing cell boundary formed by the division of a logic circuit chip to be processed into global routing cells, and a number of grids calculating units, a grid use rate calculating unit and a grid use rate checking unit for determining whether routing of a desired net is possible or not based on a state of the use of a routing track grid in each global routing cell formed on the logic circuit chip.

Abstract: Automatic routing device which automatically conducts placement and routing of integrated circuits on an integrated circuit chip, including a wire capacitance calculating unit, a degree of wire congestion calculating unit and a routing checking unit for determining whether routing of a desired net is possible or not based on degree of wire congestion at each global routing cell boundary formed by the division of a logic circuit chip to be processed into global routing cells, and a number of grids calculating unit, a grid use rate calculating unit and a grid use rate checking unit for determining whether routing of a desired net is possible or not based on a state of the use of a routing track grid in each global routing cell formed on the logic circuit chip.