Patents by Inventor Takehiko Hasebe
Takehiko Hasebe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8992665Abstract: Provided is a valuable-metal recovery method for recovering metals from lithium ion batteries using comparatively simple equipment and without using a cumbersome process. In said method, a positive electrode material from lithium ion batteries, containing lithium and a transition metal, is dissolved in an acidic solution, thereby generating lithium ions and ions of the transition metal in the acidic solution. Said acidic solution and a recovery liquid are then made to flow with an anion-permeable membrane interposed therebetween, causing the lithium ions to permeate from the acidic solution to recovery solution. Lithium ions are then recovered from the recovery liquid containing dissolved lithium ions.Type: GrantFiled: November 19, 2010Date of Patent: March 31, 2015Assignee: Hitachi, Ltd.Inventors: Yoshihide Yamaguchi, Takehiko Hasebe, Yasuko Yamada
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Publication number: 20120312126Abstract: Provided is a valuable-metal recovery method for recovering metals from lithium ion batteries using comparatively simple equipment and without using a cumbersome process. In said method, a positive electrode material from lithium ion batteries, containing lithium and a transition metal, is dissolved in an acidic solution, thereby generating lithium ions and ions of the transition metal in the acidic solution. Said acidic solution and a recovery liquid are then made to flow with an anion-permeable membrane interposed therebetween, causing the lithium ions to permeate from the acidic solution to recovery solution. Lithium ions are then recovered from the recovery liquid containing dissolved lithium ions.Type: ApplicationFiled: November 19, 2010Publication date: December 13, 2012Applicant: BioCryst Pharmaceuticals Inc.Inventors: Yoshihide Yamaguchi, Takehiko Hasebe, Yasuko Yamada
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Publication number: 20110237001Abstract: A technique for evaluating a semiconductor chip is provided. The semiconductor chip is mounted on a mount substrate, the semiconductor chip laminating on one surface of a silicone substrate, at least any of a metal wiring film 101 serving as a resistance temperature detector made up of multiple regions and a metal wiring film 102 serving as a heater made up of one or more regions, and an electrode 103 for connecting the metal wiring film 101 and the metal wiring film 102 with the mount substrate. Then, the metal wiring film 101 is electrically connected with an ammeter and a voltmeter, and the metal wiring film 102 is electrically connected with a power source, thereby providing an evaluation system which is capable of evaluating temperature measurement, heating, and temperature profile in each of the regions on the semiconductor chip.Type: ApplicationFiled: February 24, 2011Publication date: September 29, 2011Inventors: Takehiko HASEBE, Masako Kato, Yoshihide Yamaguchi, Masashi Nishiki, Naoki Matsushima, Teiichi Inada, Rei Yamamoto, Hiroyuki Temmei, Ukyo Ikeda
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Patent number: 7567019Abstract: An actuator using a piezoelectric element is stably operated at high speed. The actuator includes driving units provided to face a carrier stage and moving the carrier stage in an X-axis direction, piezoelectric elements provided to the driving units respectively and expanding and contracting in the X-axis direction, a carrier electrode provided on a surface of the carrier stage on a driving-unit side, and driving electrodes provided on surfaces of the driving units on a carrier stage side and electrostatically adsorbing the carrier electrode. Signals not synchronized with each other are applied to the piezoelectric elements.Type: GrantFiled: October 9, 2007Date of Patent: July 28, 2009Assignee: Hitachi, Ltd.Inventors: Kiyoko Yamanaka, Yasushi Goto, Takehiko Hasebe
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Publication number: 20090111062Abstract: The present invention provides a pattern formation method comprising a step of forming on a substrate a film of a first photosensitive material having low sensitivity to a light beam with a main wavelength at h-line emitted from a mask-less drawing exposure apparatus but having high sensitivity to an energy light beam containing ultraviolet light; a step of forming on the first photosensitive material a film of a second photosensitive material having higher sensitivity to a light beam with the main wavelength at h-line; a step of drawing a second pattern on the second photosensitive material with the mask-less direct drawing exposure apparatus; a step of developing the second photosensitive material; and a step of exposing to a light beam the second photosensitive material with the second pattern formed thereon and the first photosensitive material in batch to form a target first pattern on the first photosensitive material.Type: ApplicationFiled: October 29, 2008Publication date: April 30, 2009Applicant: Hitachi Via Mechanics, Ltd.Inventors: Masako Kato, Yoshihide Yamaguchi, Takehiko Hasebe, Masakazu Kishi, Tsuyoshi Yamaguchi
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Publication number: 20090008128Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: ApplicationFiled: July 31, 2008Publication date: January 8, 2009Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji
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Patent number: 7425762Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: GrantFiled: December 4, 2006Date of Patent: September 16, 2008Assignee: Hitachi, Ltd.Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji
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Publication number: 20080088208Abstract: An actuator using a piezoelectric element is stably operated at high speed. The actuator includes driving units provided to face a carrier stage and moving the carrier stage in an X-axis direction, piezoelectric elements provided to the driving units respectively and expanding and contracting in the X-axis direction, a carrier electrode provided on a surface of the carrier stage on a driving-unit side, and driving electrodes provided on surfaces of the driving units on a carrier stage side and electrostatically adsorbing the carrier electrode. Signals not synchronized with each other are applied to the piezoelectric elements.Type: ApplicationFiled: October 9, 2007Publication date: April 17, 2008Inventors: Kiyoka Yamanaka, Yasushi Goto, Takehiko Hasebe
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Patent number: 7355270Abstract: The present invention intends to prevent the communication distance from becoming shorter with a reduction in size of a coil antenna to the chip size and with a consequent decrease of an induced voltage. According to the present invention there is provided a semiconductor chip having a coil antenna and a circuit surface and adapted to transmit and receive signals by radio to and from an external device. The semiconductor chip has a configuration for increasing an electromagnetic coupling coefficient between the coil antenna and the external device. According to a concrete example thereof, a magnetic material is disposed, the coil antenna is formed by a stacked structure comprising plural conductor layers and insulating layers superimposed one on another, or the coil antenna is disposed outside an external form of a circuit of the semiconductor chip.Type: GrantFiled: January 7, 2005Date of Patent: April 8, 2008Assignee: Hitachi, Ltd.Inventors: Takehiko Hasebe, Yasushi Goto, Kouichi Uesaka, Yoshiaki Yazawa, Makoto Torigoe
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Patent number: 7351597Abstract: The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.Type: GrantFiled: May 18, 2007Date of Patent: April 1, 2008Assignee: Renesas Technology Corp.Inventors: Yuji Wada, Susumu Kasukabe, Takehiko Hasebe, Yasunori Narizuka, Akira Yabushita, Terutaka Mori, Akio Hasebe, Yasuhiro Motoyama, Teruo Shoji, Masakazu Sueyoshi
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Publication number: 20070218572Abstract: The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.Type: ApplicationFiled: May 18, 2007Publication date: September 20, 2007Inventors: Yuji Wada, Susumu Kasukabe, Takehiko Hasebe, Yasunori Narizuka, Akira Yabushita, Terutaka Mori, Akio Hasebe, Yasuhiro Motoyama, Teruo Shoji, Masakazu Sueyoshi
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Patent number: 7219422Abstract: The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.Type: GrantFiled: January 29, 2004Date of Patent: May 22, 2007Assignee: Renesas Technology Corp.Inventors: Yuji Wada, Susumu Kasukabe, Takehiko Hasebe, Yasunori Narizuka, Akira Yabushita, Terutaka Mori, Akio Hasebe, Yasuhiro Motoyama, Teruo Shoji, Masakazu Sueyoshi
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Publication number: 20070080447Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: ApplicationFiled: December 4, 2006Publication date: April 12, 2007Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji
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Publication number: 20070030791Abstract: In a probe memory device, a technique of realizing consistency of high-density recording and high-speed reading/writing is provided. A recording medium is placed to a probe array chip on which a plurality of probes are arranged in such a way as to maintain a constant spacing thereto by adopting a high-stiffness elastic support structure. The recording medium is equipped with a stage scanner that is driven continuously while drawing a constant trajectory on an X-Y plane almost in parallel to a probe array chip plane. The probes are equipped with respective actuators each being driven in a Z direction almost perpendicular to the X-Y plane. Each of the probes is made to write or read by altering a distance between the probe and the recording medium in parallel processing. The X-Y actuator is controlled so that the probe may continue a predetermined cyclic movement.Type: ApplicationFiled: July 10, 2006Publication date: February 8, 2007Inventors: Takehiko Hasebe, Yasushi Goto, Kiyoko Yamanaka
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Patent number: 7145231Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: GrantFiled: May 13, 2004Date of Patent: December 5, 2006Assignee: Hitachi, Ltd.Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji
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Patent number: 7049837Abstract: A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.Type: GrantFiled: October 2, 2003Date of Patent: May 23, 2006Assignee: Renesas Technology Corp.Inventors: Susumu Kasukabe, Takehiko Hasebe, Yasunori Narizuka, Akio Hasebe
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Publication number: 20050173532Abstract: The present invention intends to prevent the communication distance from becoming shorter with a reduction in size of a coil antenna to the chip size and with a consequent decrease of an induced voltage. According to the present invention there is provided a semiconductor chip having a coil antenna and a circuit surface and adapted to transmit and receive signals by radio to and from an external device. The semiconductor chip has a configuration for increasing an electromagnetic coupling coefficient between the coil antenna and the external device. According to a concrete example thereof, a magnetic material is disposed, the coil antenna is formed by a stacked structure comprising plural conductor layers and insulating layers superimposed one on another, or the coil antenna is disposed outside an external form of a circuit of the semiconductor chip.Type: ApplicationFiled: January 7, 2005Publication date: August 11, 2005Inventors: Takehiko Hasebe, Yasushi Goto, Kouichi Uesaka, Yoshiaki Yazawa, Makoto Torigoe
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Publication number: 20040207073Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: ApplicationFiled: May 13, 2004Publication date: October 21, 2004Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji
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Publication number: 20040183556Abstract: Provided is a fabrication method of a semiconductor integrated circuit device which comprises forming a pushing mechanism by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal, placing an elastomer in the groove so that a predetermined amount exceeds the groove, and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. The present invention makes it possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.Type: ApplicationFiled: January 29, 2004Publication date: September 23, 2004Inventors: Yuji Wada, Susumu Kasukabe, Takehiko Hasebe, Yasunori Narizuka, Akira Yabushita, Terutaka Mori, Akio Hasebe, Yasuhiro Motoyama, Teruo Shoji, Masakazu Sueyoshi
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Patent number: 6744135Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.Type: GrantFiled: May 17, 2002Date of Patent: June 1, 2004Assignee: Hitachi, Ltd.Inventors: Takehiko Hasebe, Takehide Yokozuka, Nobuyuki Ushifusa, Masahide Harada, Eiji Matsuzaki, Hiroshi Hozoji