Abstract: A coplanar waveguide includes a signal line formed on a major surface of a high-resistivity silicon substrate, a pair of ground conductors placed on opposite sides of the signal line, and a pair of trenches formed in the substrate between the signal line and the ground conductors. Because of the trenches, the attenuation characteristics of the coplanar waveguide are highly uniform, and are comparable to the attenuation characteristics of coplanar waveguides formed on compound semiconductor substrates.

Abstract: A coplanar waveguide includes a high resistance silicon substrate having one primary surface on which an amorphous silicon layer is formed, an insulated layer formed on the amorphous silicon layer, a signal line arranged on the insulated layer and a pair of ground planes arranged on the insulated layer so as to put the signal line between the planes. The coplanar waveguide is not structured as conventionally having a thick insulated layer formed on a single-crystalline silicon substrate, thereby reducing attenuation otherwise caused by leakage of electromagnetic wave in a frequency bandwidth of millimeter wave.

Abstract: A coplanar waveguide includes a signal line formed on a major surface of a high-resistivity silicon substrate, a pair of ground conductors placed on opposite sides of the signal line, and a pair of trenches formed in the substrate between the signal line and the ground conductors. Because of the trenches, the attenuation characteristics of the coplanar waveguide are highly uniform, and are comparable to the attenuation characteristics of coplanar waveguides formed on compound semiconductor substrates.

Abstract: In a semiconductor fabrication process, a compound semiconductor layer including nitrogen is treated with nitrogen plasma to recover from nitrogen vacancies in its surface. For example, in the fabrication of a compound semiconductor transistor, a first compound semiconductor layer including nitrogen and a second compound semiconductor layer differing in composition from the first compound semiconductor layer are deposited, source and drain electrodes are formed on the second compound semiconductor layer, and part of the second compound semiconductor layer between the source and drain electrodes is removed by dry etching to expose the first compound semiconductor layer. The first compound semiconductor layer is annealed to remove adsorbed dry etching gas species; then its exposed surface is treated with nitrogen plasma to recover from nitrogen vacancies left by the dry etching and annealing processes.

Abstract: A method of fabricating a layered structure including a substrate, a first semiconductor layer with a first thermal expansion coefficient &agr;A, and a second semiconductor layer with a second thermal expansion coefficient &agr;B deposited on the first semiconductor layer, wherein &agr;Ais greater than &agr;B or smaller than &agr;B, includes: forming the first semiconductor layer, the second semiconductor layer, and a third semiconductor layer with a third thermal expansion coefficient &agr;C in this order on the substrate at a first temperature using a film deposition technique such as MOCVD, thereby forming a structural body including the substrate and the first to third semiconductor layers, wherein &agr;C is greater than &agr;B if &agr;A is greater than &agr;B or &agr;C is smaller than &agr;B if &agr;A is smaller than &agr;B; cooling the structural body to a second temperature, which is lower than the first temperature; and removing the third semiconductor layer from the structural body to expose the seco

Abstract: A method of fabricating a layered structure including a substrate, a first semiconductor layer with a first thermal expansion coefficient &agr;A, and a second semiconductor layer with a second thermal expansion coefficient &agr;B deposited on the first semiconductor layer, wherein &agr;A is greater than &agr;B or smaller than &agr;B, includes: forming the first semiconductor layer, the second semiconductor layer, and a third semiconductor layer with a third thermal expansion coefficient &agr;C in this order on the substrate at a first temperature using a film deposition technique such as MOCVD, thereby forming a structural body including the substrate and the first to third semiconductor layers, wherein &agr;C is greater than &agr;B if &agr;A is greater than &agr;B or &agr;C is smaller than &agr;B if &agr;A is smaller than &agr;B; cooling the structural body to a second temperature, which is lower than the first temperature; and removing the third semiconductor layer from the structural body to expose the sec