Patents by Inventor Takehiko Nishida

Takehiko Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110273023
    Abstract: A battery apparatus includes a row battery group including a plurality of series-connected row batteries including one or more battery cells; a plurality of battery management sections, corresponding to the individual row batteries, for managing the battery statuses of the corresponding row batteries; a central management section for granting unique identification information to the individual battery management sections and acquiring information about the battery statuses of the row batteries from the respective battery management sections for management; second communication lines with which the plurality of battery management sections are daisy-chained; a first communication line with which, of the plurality of battery management sections, the battery management section located at one end is connected to the central management section; and a plurality of connection switching sections, provided in the individual second communication lines between the battery management sections, for switching the connection
    Type: Application
    Filed: November 30, 2009
    Publication date: November 10, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Takehiko Nishida, Katsuo Hashizaki, Kazuyuki Adachi, Shinji Murakami, Kouji Kurayama, Hirofumi Fujita
  • Publication number: 20110250477
    Abstract: Safety is ensured even when installed in mobile objects such as electric vehicles, deep-sea explorers, and so on. A battery module (10) provided with a plurality of battery packs (13) and a unit battery container (14) that houses these battery packs (13), wherein the unit battery container (14) includes a top-half housing (18), which is a lid, and a bottom-half housing (19) where the battery packs (13) are mounted, and wherein through-holes are formed in the bottom-half housing (19) so as to penetrate in the plate-thickness direction thereof at positions that face center portions of lower surfaces of the individual battery packs (13); branch pipes (23) are individually connected to the individual through-holes; these branch pipes (23) are connected to a single main pipe (25) that is provided with a liquid-leakage detecting sensor (24) at one end thereof; and the liquid-leakage detecting sensor (24) is connected to a liquid-leakage detecting device (27) via a signal cable (26).
    Type: Application
    Filed: October 26, 2009
    Publication date: October 13, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Tadashi Yoshida, Katsuo Hashizaki, Masazumi Ohishi, Takehiko Nishida, Katsuaki Kobayashi
  • Publication number: 20110221394
    Abstract: A secondary cell control system includes a plurality of cells; a charging circuit section and a discharging circuit section. The charging circuit section charges cells selected from among said plurality of cells, and the discharging circuit section discharges cells selected from among said plurality of cells.
    Type: Application
    Filed: June 30, 2009
    Publication date: September 15, 2011
    Applicants: MITSUBISHI HEAVY INDUSTRIES, LTD., KYUSHU ELECTRIC POWER CO., INC.
    Inventors: Tetsuro Shigemizu, Takehiko Nishida, Katsuo Hashizaki, Hidehiko Tajima, Katsuaki Kobayashi, Kazuyuki Adachi, Shinji Murakami, Yoshihiro Wada, Hiroyuki Shibata, Kouji Kurayama
  • Publication number: 20110165442
    Abstract: In order to identify whether each of the cells in a storage battery system is available, the storage battery system is equipped with secondary cell packs, information storage parts which are respectively installed to the secondary cell packs to store cell information on the respective secondary cell packs, and monitor device which judges whether loading to the storage battery system is possible according to the cell information stored in the information storage part.
    Type: Application
    Filed: July 17, 2008
    Publication date: July 7, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Tsutomu Hashimoto, Katsuo Hashizaki, Takehiko Nishida
  • Publication number: 20110127964
    Abstract: An object is to reliably conduct cell balancing operation while suppressing deterioration of batteries and maintaining operating efficiency. When the cell balance control by the cell balancing circuit 3 is started, the system control device 30 sets an on/off device corresponding to the arm where the cell balance control is conducted to the open state; and when the cell balance control is completed, and the difference between the terminal voltage of a battery pack of the arm where the cell balance control has been conducted and the terminal voltages of the battery packs of the other arms falls within a preset allowable range, sets the on/off device, which has been in the open state, to the closed state.
    Type: Application
    Filed: October 30, 2008
    Publication date: June 2, 2011
    Applicants: MITSUBISHI HEAVY INDUSTRIES, LTD., KYUSHU ELECTRIC POWER CO., INC.
    Inventors: Takehiko Nishida, Tetsuro Shigemizu, Katsuo Hashizaki, Kazuyuki Adachi, Shinji Murakami, Yoshihiro Wada, Kouji Kurayama, Hirofumi Fujita
  • Publication number: 20100207580
    Abstract: It is an object to provide a battery system whose life can be extended. A cell pack having at least one lithium secondary battery that uses a manganese-based cathode material and a control unit that controls charging and discharging of the cell pack are provided, and the control unit controls charging and discharging within a low-degradation voltage range that is set on the basis of a target cell degradation rate.
    Type: Application
    Filed: March 31, 2008
    Publication date: August 19, 2010
    Applicants: MITSUBISHI HEAVY INDUSTRIES, LTD., KYUSHU ELECTRIC POWER CO., INC.
    Inventors: Takehiko Nishida, Katsuaki Kobayashi, Tomoh Akiyama, Katsuo Hashizaki, Hidehiko Tajima, Kazuyuki Adachi, Shinji Murakami, Yoshihiro Wada, Hiroyuki Shibata, Kouji Kurayama
  • Publication number: 20100196749
    Abstract: Disclosed is a cell container offering improved vibration resistance and improved shock resistance as well as maintaining the battery performance and ensuring the reliability. Specifically disclosed is a cell container comprising: an insulative case (31) in which a plurality of unit cells are placed side by side; insulative wall portions (34) for partitioning between the plurality of unit cells; and support projections (35) projecting from at least either one of the case (31) or the wall portions (34) toward the unit cells to support the unit cells.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 5, 2010
    Applicants: MITSUBISHI HEAVY INDUSTRIES, LTD., KYUSHU ELECTRIC POWER CO., INC.
    Inventors: Tadashi Yoshida, Katsuo Hashizaki, Masazumi Ohishi, Takehiko Nishida, Katsuaki Kobayashi, Kazuyuki Adachi, Shinji Murakami, Yoshihiro Wada, Kouji Kurayama
  • Publication number: 20100176765
    Abstract: It is an object to effectively output electrical energy of a storage battery to an electrical power system serving as a whole distributed power supply system by effectively utilizing the electrical energy within a charging ratio range that does not cause overcharging or overdischarging of the storage battery. In a hybrid distributed power supply system, the target supply electrical power is set based on the electrical power generation output of the electrical power generator and the charging state of the storage battery, and the target supply electrical power is restricted within a predetermined permissible supply electrical power range when the target supply electrical power deviates from the predetermined permissible supply electrical power range.
    Type: Application
    Filed: December 18, 2007
    Publication date: July 15, 2010
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Tetsuro Shigemizu, Takehiko Nishida, Katsuaki Kobayashi, Hidehiko Tajima
  • Publication number: 20100033135
    Abstract: An object is to improve safety. Provided is a power storage system including a battery apparatus 1; a power converter 2 provided between the battery apparatus 1 and a load 3 and that can control power supplied from the battery apparatus 1 to the load 3; and a battery monitoring circuit 4 that detects an abnormality in the battery apparatus 1. When an abnormality in the battery apparatus 1 is detected by the battery monitoring circuit 4, the power converter 2 supplies power stored in the battery apparatus 1 to the load 3 or to an internally provided internal load at or below a current value or power value that is set in advance, or alternatively, at a current value or power value that the load 3 demands, within a range that does not exceed an upper limit that is set in advance.
    Type: Application
    Filed: March 14, 2009
    Publication date: February 11, 2010
    Applicants: MITSUBISHI HEAVY INDUSTRIES, LTD., KYUSHU ELECTRIC POWER CO., INC.
    Inventors: Takehiko Nishida, Katsuaki Kobayashi, Katsuo Hashizaki, Hidehiko Tajima, Kazuyuki Adachi
  • Patent number: 7602389
    Abstract: A data processing system including: a memory controller; and a memory connected to said memory controller; wherein said memory controller includes a rendering circuit thereby to execute a rendering command generating display data based on graphic data provided after processing a program in a CPU, and stores said display data in said memory.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: October 13, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Publication number: 20060203000
    Abstract: A data processing system including: a memory controller; and a memory connected to said memory controller; wherein said memory controller includes a rendering circuit thereby to execute a rendering command generating display data based on graphic data provided after processing a program in a CPU, and stores said display data in said memory.
    Type: Application
    Filed: March 2, 2006
    Publication date: September 14, 2006
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 7019751
    Abstract: A graphic processing apparatus for generating, display or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column address within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: March 28, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 6704019
    Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: March 9, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Publication number: 20040027354
    Abstract: A graphic processing apparatus for generating, display or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column address within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Application
    Filed: August 8, 2003
    Publication date: February 12, 2004
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Publication number: 20020126125
    Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Application
    Filed: April 17, 2002
    Publication date: September 12, 2002
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 6377267
    Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: April 23, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 6222563
    Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: April 24, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 5991030
    Abstract: The apparatus for reading a luminescence pattern is equipped with a stage on which the sample to be read is mounted. A photoreceptor disk is installed in the lower part of the stage and scans and condenses light from the luminescent pattern of the sample at positions determined by the rotation of a rotary plate. A transport mechanism causes the stage and the photoreceptor disk to undergo relative motion. An optical guide part guides the light from the luminescent pattern to a photoelectric converter. The optical guide part may include mirrors or one or more optical fibers. The photoelectric converter converts the light into an electrical signal. A controller controls how scanning is performed by the photoreceptor disk and transport mechanism and generates a read scanning position signal. A data processor performs data processing by converting the electrical signal into a digital signal and obtains a scanning position signal from the controller.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: November 23, 1999
    Assignee: Hitachi Software Engineering Co., Ltd.
    Inventors: Kenji Yamamoto, Hisanori Nasu, Toshimasa Watanabe, Yuuji Tsukamoto, Tateo Kondou, Takehiko Nishida, Hitoshi Fujimiya, Noriko Yurino
  • Patent number: 5940087
    Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: August 17, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Koyo Katsura, Yasushi Fukunaga, Ryo Fujita, Kazuyoshi Koga, Takehiko Nishida
  • Patent number: 5917496
    Abstract: The present invention relates to a three-dimensional graphic display apparatus for performing a hidden surface removal and color blending, and particularly to a configuration of a special purpose memory for graphics and a configuration of a graphic display apparatus using the special purpose memory. The special purpose memory for graphics according to the present invention comprises a memory cell for holding intensity information (RGB) and window information about each pixel therein, an XY coordinate converter for converting XY coordinates of a pixel to be written to a memory address, an intensity blending processor, and hidden-surface removal and window comparators, all of which are formed on the same chip.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: June 29, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Ryo Fujita, Mitsuru Soga, Yasushi Fukunaga, Takehiko Nishida