Patents by Inventor Takehisa Sugahara

Takehisa Sugahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942180
    Abstract: A memory system includes semiconductor memory devices and a control device. Each of the semiconductor memory devices includes a first pad to which a first signal is input, a second pad to which a second signal is input, a third pad to which a third signal is input, a memory cell array, a sense amplifier, and a data register. In a first mode, after the first signal is switched, a command set instructing a data out operation is input via the second pad. In a second mode, after the first signal is switched, the command is input via at least the third pad. The control device executes a first operation assigning different addresses to the respective semiconductor memory devices and a second operation causing the modes of the respective semiconductor memory devices to be switched from the first to the second mode.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: March 26, 2024
    Assignee: KIOXIA CORPORATION
    Inventors: Zhao Lyu, Akio Sugahara, Takehisa Kurosawa, Yuji Nagai, Hisashi Fujikawa
  • Publication number: 20240094959
    Abstract: A semiconductor memory device comprises: a first pad receiving a first signal; a second pad receiving a second signal; a first memory cell array; a first sense amplifier connected to the first memory cell array; a first data register connected to the first sense amplifier and configured to store user data read from the first memory cell array; and a control circuit configured to execute an operation targeting the first memory cell array. The first memory cell array comprises a plurality of first memory strings. The first memory strings each comprise a plurality of first memory cell transistors. In a first mode of this semiconductor memory device, a command set instructing the operation is inputted via the first pad. In a second mode of this semiconductor memory device, the command set is inputted via the second pad.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: KIOXIA CORPORATION
    Inventors: Akio SUGAHARA, Zhao LU, Takehisa KUROSAWA, Yuji NAGAI
  • Patent number: 4859614
    Abstract: A semiconductor device comprising: a semiconductor chip; a package for accommodating the chip; groups of leads which are arranged around the perimeter of the package; and strip; insulators, such as plastic films, to each of which one of the groups of leads are adhered. In addition, a method for manufacturing the device, comprising the steps of: preparing a package including a semiconductor chip and having lead frames each of which is composed of leads and a supporting end portion; adhering the lead frames to an insulating sheet such as a plastic film; and clipping off the portions of the insulating sheet to which the supporting end portions are adhered.
    Type: Grant
    Filed: November 30, 1987
    Date of Patent: August 22, 1989
    Assignee: Fujitsu Limited
    Inventors: Takehisa Sugahara, Toyokatu Nakagawa, Junichi Yano
  • Patent number: 4340902
    Abstract: A semiconductor device having a semiconductor chip (102), a ceramic base (101), a ceramic frame (105) and a cover (106). The ceramic base (101) is formed with a through hole. One side of said hole is covered by a high-heat conductivity metal plate (100). Said semiconductor chip (102) is mounted through a molybdenum plate (110) on the bottom of a recess formed by one side by said high-heat conductivity metal plate (100) and said through hole. A cooling means (107,108) is secured on said high-heat conductivity metal plate (100) opposite to the side for receiving the semiconductor chip (102).
    Type: Grant
    Filed: July 12, 1979
    Date of Patent: July 20, 1982
    Assignee: Fujitsu Limited
    Inventors: Norio Honda, Takehisa Sugahara