Patents by Inventor Takehito Kamimura

Takehito Kamimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230291372
    Abstract: An amplifier circuit 1001 with a variable temperature coefficient of a gain is an amplifier circuit with a variable temperature coefficient of a gain in which a variable resistor VR is connected between a first signal and a second signal having temperature coefficients of an amplification factor different from each other, a variable output of the variable resistor VR is connected to an input of a buffer amplifier Ub, and an output of the buffer amplifier Ub is used as an output Vo, wherein the first signal is an output of a first temperature coefficient circuit 100, and the second signal is an output of another amplifier circuit 501.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 14, 2023
    Inventors: Shingo SOBUKAWA, Takehito KAMIMURA, Tatsuru TAMORI
  • Patent number: 11428548
    Abstract: A capacitance measuring circuit measures an electrostatic capacitance formed between a first conductor that receive an AC signal and a second conductor. The capacitance measuring circuit includes an amplifier including an input and an output; signal detection means including a negative feedback unit that has a feedback capacitance and applies a negative feedback from an output of the amplifier to an input of the amplifier, wherein an input of the amplifier is connected to the second conductor and is virtually grounded by the negative feedback unit and an AC signal of an amplitude in a functional relation with the electrostatic capacitance is output; and measuring means that is connected to an output of the signal detection means and has a function of measuring at least an amplitude of an AC signal output of the signal detection means.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: August 30, 2022
    Assignee: NF HOLDINGS CORPORATION
    Inventors: Shingo Sobukawa, Keita Murase, Takehito Kamimura
  • Publication number: 20210072048
    Abstract: A capacitance measuring circuit measures an electrostatic capacitance formed between a first conductor that receive an AC signal and a second conductor. The capacitance measuring circuit includes an amplifier including an input and an output; signal detection means including a negative feedback unit that has a feedback capacitance and applies a negative feedback from an output of the amplifier to an input of the amplifier, wherein an input of the amplifier is connected to the second conductor and is virtually grounded by the negative feedback unit and an AC signal of an amplitude in a functional relation with the electrostatic capacitance is output; and measuring means that is connected to an output of the signal detection means and has a function of measuring at least an amplitude of an AC signal output of the signal detection means.
    Type: Application
    Filed: October 28, 2020
    Publication date: March 11, 2021
    Inventors: Shingo SOBUKAWA, Keita MURASE, Takehito KAMIMURA
  • Patent number: 9698783
    Abstract: Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: July 4, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Wen Li, Norio Chujo, Masami Makuuchi, Takehito Kamimura
  • Publication number: 20140125398
    Abstract: Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).
    Type: Application
    Filed: May 24, 2012
    Publication date: May 8, 2014
    Applicant: Hitachi, Ltd.
    Inventors: Wen Li, Norio Chujo, Masami Makuuchi, Takehito Kamimura
  • Patent number: 8067984
    Abstract: There is provided a variable gain circuit system which is inductorless and capable of achieving a high gain and a wide band by elements for achieving variable gain to prevent decreasing a gain or deteriorating the band. The variable gain circuit includes: transistors; a resistor connected as a load of each transistor; a voltage source applying a bias voltage to each gate of the transistors; a switch selectively connecting the voltage source or a ground potential to each gate of the transistors in accordance with gain setting; and a current source connected to a common input. A drain of each transistor is connected to an input of a circuit in a subsequent stage.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 29, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takehito Kamimura, Norio Chujo
  • Publication number: 20110181271
    Abstract: A peaking circuit according to the present invention includes amplifiers connected in multiple stages and feedback circuits for feedback to an input from two or more output points with different gains as seen from the input. The peaking circuit is configured to be able to change an amount of feedback of the feedback circuits.
    Type: Application
    Filed: January 26, 2011
    Publication date: July 28, 2011
    Inventors: Norio CHUJO, Takehito Kamimura
  • Publication number: 20100315166
    Abstract: There is provided a variable gain circuit system which is inductorless and capable of achieving a high gain and a wide band by elements for achieving variable gain to prevent decreasing a gain or deteriorating the band. The variable gain circuit includes: transistors; a resistor connected as a load of each transistor; a voltage source applying a bias voltage to each gate of the transistors; a switch selectively connecting the voltage source or a ground potential to each gate of the transistors in accordance with gain setting; and a current source connected to a common input. A drain of each transistor is connected to an input of a circuit in a subsequent stage.
    Type: Application
    Filed: June 9, 2010
    Publication date: December 16, 2010
    Applicant: Hitachi, Ltd.
    Inventors: Takehito KAMIMURA, Norio Chujo