Patents by Inventor Takehito Tsukamoto

Takehito Tsukamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10672928
    Abstract: A metal foil pattern layered body of the invention includes a base member; a metal foil including a metal pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: June 2, 2020
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Takao Tomono, Takehito Tsukamoto
  • Patent number: 10056517
    Abstract: A metal foil pattern layered body of the invention includes: a base member; a metal foil including a metal foil pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: August 21, 2018
    Assignee: DSM IP ASSETS B.V.
    Inventors: Koichi Kumai, Ryuji Ueda, Takao Tomono, Takehito Tsukamoto
  • Publication number: 20170358700
    Abstract: A metal foil pattern layered body of the invention includes a base member; a metal foil including a metal pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Application
    Filed: August 25, 2017
    Publication date: December 14, 2017
    Inventors: Koichi KUMAI, Ryuji UEDA, Takao TOMONO, Takehito TSUKAMOTO
  • Patent number: 8841692
    Abstract: A lead frame comprises on a same plane, a pad part including an LED chip mounting upper surface A on which at least an LED chip is to be mounted, and a lead part including an electric connection area C in which an electric connection with the LED chip is made. A relationship between an area S1 of the mounting upper surface of the pad part 2 and an area S2 of a radiating lower surface opposite to the mounting upper surface is represented by 0<S1<S2. Side surfaces of the pad part between the mounting upper surface and the radiating lower surface are provided with stepped parts or tapered parts which spread in a direction from the mounting upper surface toward the radiating lower surface and hold a resin-filled during molding.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: September 23, 2014
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Osamu Yoshioka, Hitoshi Motomura, Takehito Tsukamoto
  • Patent number: 8809478
    Abstract: A curable composition includes: 100 parts by mass of a silicon-containing polymer having a Mw of 3,000 to 100,000 obtainable by hydrolysis-condensation of an organosilane mixture including R1SiX3, R2SiX3, R3R4SiX2 and R5SiX3, the total of R2SiX3 and R3R4SiX2 being 5 to 60 mol %, optionally a prepolymer, optionally a cyclic siloxane compound, 0.0001 to 10 parts by mass of an organic peroxide and optionally a metal catalyst, and 10 to 1,500 parts by mass of a filler, wherein R1 is a C2-6 alkenyl group, R2 is a C1-6 alkyl group, R3 and R4 are each a C1-6 alkyl group, R5 is a phenyl group optionally substituted with a C1-6 alkyl group, and X is a C1-6 alkoxy group, one or more of R2 to R4 is a methyl group, f represents a number of 2 to 10, g represents a number of 0 to 8, and n represents 1 or 2.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: August 19, 2014
    Assignee: Adeka Corporation
    Inventors: Masako Saito, Ichiro Hiratsuka, Masahiro Wada, Ryota Chiba, Takuya Kanazawa, Osamu Yoshioka, Takehito Tsukamoto, Junko Toda
  • Patent number: 8703598
    Abstract: A manufacturing method of a lead frame substrate includes: applying a photosensitive resist or a dry film to first and second surfaces of a metal plate; pattern-exposing the photosensitive resist or the dry film, and then developing the first surface and the second surface to form on the first surface a first resist pattern for forming a connection post and to form on the second surface a second resist pattern for forming a wiring pattern; etching the first surface partway down the metal plate to form the connection post; filling the first surface with a pre-molding resin to a thickness with which the etched surface is buried; removing the pre-molding resin uniformly in a thickness direction of the pre-molding resin until a bottom surface of the connection post is exposed; and etching the second surface to form a wiring pattern.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: April 22, 2014
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Susumu Maniwa, Takehito Tsukamoto, Junko Toda
  • Publication number: 20140090698
    Abstract: A metal foil pattern layered body of the invention includes: a base member; a metal foil including a metal foil pattern formed by an opening and a metal portion; and a protuberance provided at the metal foil and at a boundary between the opening and the metal portion.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 3, 2014
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koichi KUMAI, Ryuji UEDA, Takao TOMONO, Takehito TSUKAMOTO
  • Publication number: 20140021162
    Abstract: A manufacturing method of a lead frame substrate includes: applying a photosensitive resist or a dry film to first and second surfaces of a metal plate; pattern-exposing the photosensitive resist or the dry film, and then developing the first surface and the second surface to form on the first surface a first resist pattern for forming a connection post and to form on the second surface a second resist pattern for forming a wiring pattern; etching the first surface partway down the metal plate to form the connection post; filling the first surface with a pre-molding resin to a thickness with which the etched surface is buried; removing the pre-molding resin uniformly in a thickness direction of the pre-molding resin until a bottom surface of the connection post is exposed; and etching the second surface to form a wiring pattern.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 23, 2014
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Susumu Maniwa, Takehito Tsukamoto, Junko Toda
  • Patent number: 8558363
    Abstract: A lead frame substrate, includes: a metal plate having first and second surfaces; a semiconductor element mounting section, semiconductor element electrode connection terminals, and a first outer frame section formed on the first surface; external connection terminals formed on the second surface and electrically connected with the semiconductor element electrode connection terminals; a second outer frame section formed on the second surface; and a resin layer formed on a gap between the first outer frame and the second outer frame. Each external connection terminal buried in the resin layer has at least one projection formed on a side surface thereof throughout a side lower portion of the first surface.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: October 15, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Takehito Tsukamoto, Susumu Maniwa, Junko Toda, Yasuhiro Sakai
  • Patent number: 8546940
    Abstract: A lead frame substrate, including: a metal plate with a first surface and a second surface; a connection post formed on the first surface; wiring formed on the second surface; and a pre-molding resin layer, in which a thickness of the pre-molding resin layer is the same as a height of the connection post.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: October 1, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Susumu Maniwa, Takehito Tsukamoto, Junko Toda
  • Patent number: 8535979
    Abstract: A manufacturing method of a semiconductor element substrate including: forming a first photoresist pattern on a first surface of a metallic plate, to form a semiconductor element mounting part, a semiconductor element electrode connection terminal, a wiring, an outer frame part, and a slit; forming a second photoresist pattern on the second surface of the metallic plate; forming the slit by half etching to connect the metallic chip with a four corners of the outer frame part; forming a plurality of concaved parts on the second surface of the metallic plate; forming a resin layer by injecting a resin to the plurality of concaved parts; and etching the first surface of the metallic plate and forming the semiconductor element electrode connection terminal and the outer frame.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: September 17, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Junko Toda, Susumu Maniwa, Takehito Tsukamoto
  • Patent number: 8535987
    Abstract: A manufacturing method of a substrate for a semiconductor element, wherein a first step includes: forming a first and second photosensitive resin layer on a first and second surface of a metal plate, respectively; forming a first and second resist pattern on the first and second surface, for forming a connection post and a wiring pattern, respectively. A second step includes: forming the connection post and wiring pattern; filling in a premold liquid resin to the first surface which was etched; forming a premold resin layer by hardening the premold liquid resin; performing a grinding operation on the first surface, and exposing an upper bottom surface of the connection post from the premold resin layer. A groove structure is formed by the first and second steps, wherein a depth of the groove is up to an intermediate part in a thickness direction of the metal plate.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 17, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Susumu Maniwa, Takehito Tsukamoto, Junko Toda
  • Patent number: 8466547
    Abstract: Provided is a manufacturing method of a substrate for a semiconductor element including the steps of: providing a first photosensitive resin layer on a first surface of a metal plate; providing a second photosensitive resin layer on a second surface different from the first surface of the metal plate; forming a first etching mask for forming a connection post on the first surface of the metal plate; forming a second etching mask for forming a wiring pattern on the second surface of the metal plate; forming the connection post by performing an etching from the first surface to a midway of the metal plate; filling in a premold resin to a portion of the first surface where the connection post does not exist; processing so that a height of the connection post of the first surface is lower than a height of the premold resin surrounding the connection post; and forming the wiring pattern by performing an etching on the second surface.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: June 18, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Susumu Maniwa, Takehito Tsukamoto, Junko Toda
  • Publication number: 20130075154
    Abstract: A curable composition includes: 100 parts by mass of a silicon-containing polymer having a Mw of 3,000 to 100,000 obtainable by hydrolysis-condensation of an organosilane mixture including R1SiX3, R2SiX3, R3R4SiX2 and R5SiX3, the total of R2SiX3 and R3R4SiX2 being 5 to 60 mol %, optionally a prepolymer, optionally a cyclic siloxane compound, 0.0001 to 10 parts by mass of an organic peroxide and optionally a metal catalyst, and 10 to 1,500 parts by mass of a filler, wherein R1 is a C2-6 alkenyl group, R2 is a C1-6 alkyl group, R3 and R4 are each a C1-6 alkyl group, R5 is a phenyl group optionally substituted with a C1-6 alkyl group, and X is a C1-6 alkoxy group, one or more of R2 to R4 is a methyl group, f represents a number of 2 to 10, g represents a number of 0 to 8, and n represents 1 or 2.
    Type: Application
    Filed: June 6, 2011
    Publication date: March 28, 2013
    Applicant: ADEKA CORPORATION
    Inventors: Masako Saito, Ichiro Hiratsuka, Masahiro Wada, Ryota Chiba, Takuya Kanazawa, Osamu Yoshioka, Takehito Tsukamoto, Junko Toda
  • Patent number: 8390105
    Abstract: A lead frame substrate, including: a metal plate having a first surface and a second surface; a semiconductor element mount portion and a semiconductor element electrode connection terminal that are formed on the first surface; an external connection terminal formed on the second surface and electrically connected to the semiconductor element electrode connection terminal; a conducting wire that connects the semiconductor element electrode connection terminal and the external connection terminal to each other; a resin layer formed on the metal plate; a hole portion that is partly formed in the second surface of the metal plate and does not penetrate the metal plate; and a plurality of protrusions that are formed on a bottom surface of the hole portion and protrude in a direction away from the metal plate, the protrusions having a height lower than a position of the second surface, not being in electrical conduction with the conducting wire, and being dispersed separately.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: March 5, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Junko Toda, Susumu Maniwa, Yasuhiro Sakai, Takehito Tsukamoto
  • Patent number: 8319322
    Abstract: Provided is a manufacturing method of a semiconductor element substrate including: a step of forming a first photoresist pattern on a first surface of a metallic plate, to form a semiconductor element mounting part, a semiconductor element electrode connection terminal, a wiring, an outer frame part, and a slit; a step of forming a second photoresist pattern on the second surface of the metallic plate; a step of forming the slit by half etching to connect the metallic chip with a four corners of the outer frame part; a step of forming a plurality of concaved parts on the second surface of the metallic plate; a step of forming a resin layer by injecting a resin to the plurality of concaved parts; and a step of etching the first surface of the metallic plate and forming the semiconductor element electrode connection terminal and the outer frame.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 27, 2012
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Junko Toda, Susumu Maniwa, Takehito Tsukamoto
  • Patent number: 8304294
    Abstract: A method includes: forming a photoresist pattern to form each of a semiconductor element mounting section on which a semiconductor element is mounted, semiconductor element electrode connection terminals for connection with electrodes of the semiconductor element, and a first outer frame section on a first surface of a metal plate; forming a photoresist pattern to form each of external connection terminals, a second outer frame section, and grooves in at least a part of the second outer frame section on a second surface of the metal plate; etching a metal plate exposing section, in which the metal plate of the second surface is exposed, to form holes that do not pass through the metal plate exposing section and grooves that run from an inside to an outside of the second outer frame section; coating a pre-mold resin on the holes and the grooves, and heating the pre-mold resin under pressure using a flat-bed press to form a resin layer; and etching the first surface to form the semiconductor element mounting se
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: November 6, 2012
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Takehito Tsukamoto, Susumu Maniwa, Junko Toda
  • Publication number: 20120061829
    Abstract: A manufacturing method of a substrate for a semiconductor element, wherein a first step includes: forming a first and second photosensitive resin layer on a first and second surface of a metal plate, respectively; forming a first and second resist pattern on the first and second surface, for forming a connection post and a wiring pattern, respectively. A second step includes: forming the connection post and wiring pattern; filling in a premold liquid resin to the first surface which was etched; forming a premold resin layer by hardening the premold liquid resin; performing a grinding operation on the first surface, and exposing an upper bottom surface of the connection post from the premold resin layer. A groove structure is formed by the first and second steps, wherein a depth of the groove is up to an intermediate part in a thickness direction of the metal plate.
    Type: Application
    Filed: September 30, 2011
    Publication date: March 15, 2012
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Susumu MANIWA, Takehito Tsukamoto, Junko Toda
  • Publication number: 20120061809
    Abstract: Provided is a manufacturing method of a substrate for a semiconductor element, the manufacturing method including the steps of: providing a first photosensitive resin layer at a first surface of a metal plate; providing a second photosensitive resin layer at a second surface of the metal plate different from the first surface; forming a first etching mask for forming a connection post on the first surface of the metal plate; forming a second etching mask for forming a wiring post on the second surface of the metal plate; forming the connection post by performing an etching on the first surface of the metal plate from a first surface side to a midway of the metal plate; applying a premold resin in liquid form to the first surface of the metal plate which underwent the etching on the first surface; forming a premold resin layer by solidifying the premold resin in liquid form being applied; and forming a wiring pattern by performing an etching on the second surface of the metal plate from a second surface side.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 15, 2012
    Applicant: TOPPAN PRINTING CO., LTD
    Inventors: Junko TODA, Susumu Maniwa, Yasuhiro Sakai, Takehito Tsukamoto
  • Publication number: 20120018867
    Abstract: Provided is a manufacturing method of a semiconductor element substrate including: a step of forming a first photoresist pattern on a first surface of a metallic plate, to form a semiconductor element mounting part, a semiconductor element electrode connection terminal, a wiring, an outer frame part, and a slit; a step of forming a second photoresist pattern on the second surface of the metallic plate; a step of forming the slit by half etching to connect the metallic chip with a four corners of the outer frame part; a step of forming a plurality of concaved parts on the second surface of the metallic plate; a step of forming a resin layer by injecting a resin to the plurality of concaved parts; and a step of etching the first surface of the metallic plate and forming the semiconductor element electrode connection terminal and the outer frame.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 26, 2012
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Junko Toda, Susumu Maniwa, Takehito Tsukamoto