Patents by Inventor Takemi Endoh

Takemi Endoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5525546
    Abstract: A semiconductor device has a conductive interconnection layer formed on a semiconductor substrate covered with a protection insulation film. A pad electrode opening is provided in the protection insulation film so that the surface of the conductive interconnection layer is exposed in the region which becomes the pad electrode. The conductive interconnection layer is electrically connected to an external terminal by a bonding wire. At least the surface of the protection insulation film in the proximity of the pad electrode opening and the inner peripheral side face of the pad electrode opening are covered with an elastic insulation film. The pad electrode opening is covered with the bonding wire. Since the conductive interconnection layer is not exposed at the pad electrode opening according to this structure, the phenomenon of moisture intruding into the pad electrode opening to corrode the conductive interconnection layer is prevented to improve reliability.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: June 11, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Harada, Takemi Endoh, Tomohiro Ishida
  • Patent number: 5430329
    Abstract: A semiconductor device has a conductive interconnection layer formed on a semiconductor substrate covered with a protection insulation film. A pad electrode opening is provided in the protection insulation film so that the surface of the conductive interconnection layer is exposed in the region which becomes the pad electrode. The conductive interconnection layer is electrically connected to an external terminal by a bonding wire. At least the surface of the protection insulation film in the proximity of the pad electrode opening and the inner peripheral side face of the pad electrode opening are covered with an elastic insulation film. The pad electrode opening is covered with the bonding wire. Since the conductive interconnection layer is not exposed at the pad electrode opening according to this structure, the phenomenon of moisture intruding into the pad electrode opening to corrode the conductive interconnection layer is prevented to improve reliability.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: July 4, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shigeru Harada, Takemi Endoh, Tomohiro Ishida
  • Patent number: 5306947
    Abstract: The present invention is mainly characterized by providing an even surface of an interlayer insulating film for insulating and isolating an upper interconnection and a lower interconnection from each other. A lower interconnection layer is provided on a semiconductor substrate, having a pattern of stepped portions. A silicon type insulating film is provided on the semiconductor substrate so as to cover the lower interconnection layer. A silicon ladder resin film is filled in recessed portions of the surface of the silicon type insulating film for making even the surface of the silicon type insulating film. An upper interconnection layer electrically connected to the lower interconnection layer through a via hole is provided on the silicon type insulating film. The silicon ladder resin film has the structural formula: ##STR1## where R.sub.1 is at least one of a phenyl group and a lower alkyl group, R.sub.2 is at least one of a hydrogen atom and a lower alkyl group, and n is an integer of 20 to 1000.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: April 26, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Adachi, Hirozoh Kanegae, Hiroshi Mochizuki, Masanori Obata, Takemi Endoh, Kimio Hagi, Shigeru Harada, Kazuhito Matsukawa, Akira Ohhisa, Etsushi Adachi