Abstract: A multiported integrated circuit performs pointer processing at the SONET STS and VT levels, and removes overhead information from a received electrical signal derived from an optical SONET signal. The integrated circuit operates to extract STM traffic and ATM traffic from the received SONET signal, in response to provisioning information received from a management and control unit. The extracted STM traffic is then combined with path switching information, and forwarded out a pair of interfaces, which enables path selection within an STM switch fabric within a local line unit and within a switch fabric on a partner line unit in an active/standby pair of line units. The path switching information is also output from the integrated circuit for transmission to a pair of ATM switch fabric units.

Abstract: A zero string error detection circuit which detects a specified number of zeros occurring in succession in bipolar data. The detection circuit has a relatively small gate size achieved by making the shift registers in the B8ZS or B6ZS code conversion circuit serve also for zero string monitoring. The zero string error detection circuit includes a pair of shift registers which receive serial bipolar data and convert it to parallel data composed of a specified number of bits, a code detector which, upon detecting a specific code from the parallel outputs of the shift registers, issues a reset signal to the shift registers to make the outputs of the shift registers zero, a zero string monitor which issue a zero string error detection signal when the outputs of the shift registers become zero, and a gate which inhibits the zero string monitor from issuing the zero string error detection signal during a specific period when the code detector issues a reset signal.