Patents by Inventor Takeo Mimura

Takeo Mimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10365320
    Abstract: There is a need to improve estimation accuracy of a failure estimation method or its failure estimation apparatus that performs failure estimation on a targeted instrument based on history information about several instruments mounted with the same type of semiconductor device as an instrument targeted at failure estimation. A failure estimation apparatus that includes a history information database storing history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type, wherein the history information contains operation information and failure information; wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments; wherein the failure information indicates a failure cause of a failed instrument; and wherein the operating state is categorized into a plurality of classifications.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: July 30, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuji Takehara, Takeo Mimura, Tomohiro Oono
  • Publication number: 20170023634
    Abstract: There is a need to improve estimation accuracy of a failure estimation method or its failure estimation apparatus that performs failure estimation on a targeted instrument based on history information about several instruments mounted with the same type of semiconductor device as an instrument targeted at failure estimation. A failure estimation apparatus that includes a history information database storing history information about a plurality of instruments mounted with the same type of semiconductor device and performs failure estimation on a targeted instrument mounted with a semiconductor device whose type equals the type, wherein the history information contains operation information and failure information; wherein the operation information indicates a chronological operating state of the semiconductor device mounted on the instruments; wherein the failure information indicates a failure cause of a failed instrument; and wherein the operating state is categorized into a plurality of classifications.
    Type: Application
    Filed: May 31, 2016
    Publication date: January 26, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Yuji TAKEHARA, Takeo MIMURA, Tomohiro OONO
  • Patent number: 5502478
    Abstract: ElectrophotographLc image formation by an LED array consisting of a plurality of LED chips arranged in a row and a driver having a plurality of drive ICs each connected in parallel to each of m units of LED array chips within each of n groups obtained by partition of the entire LED array. To execute a scanning of the LED array chip emitting in response to drive signals from said drive IC by scanning means to provide repetitious m-divisional scans for each n-partitioned group of chips simultaneously, a control device controls each drive IC, upon leaving a scan in a finest group of chips, to start scanning LED array chips in an adjacent succeeding group with respect to the scanning direction, while another drive IC starts scanning in the first group of chips, the array and the driver thereby scanning in waves to achieve faster printing speed with reduced electronic consumption.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: March 26, 1996
    Assignee: Sunx Limited
    Inventor: Takeo Mimura