Patents by Inventor Takeo NAGASE

Takeo NAGASE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing semiconductor package and semiconductor package
    Patent number: 9548262
    Abstract: In a semiconductor package, surfaces of a die pad, a semiconductor element, a connecting member, and a lead are subjected to a surface treatment with a silane coupling agent. A first surface of a plurality of surfaces of the semiconductor device includes a first region where an organic substance is exposed, and a second region where an inorganic substance is exposed, the first surface being bonded with the connecting member. A bonding strength between the first region and the sealing resin is weaker than a bonding strength between the second region and the sealing resin.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: January 17, 2017
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yuichi Mizawa, Takeo Nagase
  • METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE
    Publication number: 20160260657
    Abstract: In a semiconductor package, surfaces of a die pad, a semiconductor element, a connecting member, and a lead are subjected to a surface treatment with a silane coupling agent. A first surface of a plurality of surfaces of the semiconductor device includes a first region where an organic substance is exposed, and a second region where an inorganic substance is exposed, the first surface being bonded with the connecting member. A bonding strength between the first region and the sealing resin is weaker than a bonding strength between the second region and the sealing resin.
    Type: Application
    Filed: September 29, 2014
    Publication date: September 8, 2016
    Inventors: Yuichi MIZAWA, Takeo NAGASE