Abstract: An image sensor circuit includes a plurality of column analog/digital conversion circuits each including: first to n-th storage elements configured to respectively store first to n-th pieces of bit data that constitute analog/digital-converted data obtained by analog/digital-converting analog signals outputted by pixels, where n is an integer greater than or equal to 2; first to (n?1)-th transfer paths configured to respectively transfer the bit data stored in the first to (n?1)-th storage elements from the first to (n?1)-th storage elements to the second to n-th storage elements; and an n-th transfer path configured to transfer the bit data stored in the n-th storage element from the n-th storage element to outside the plurality of column analog/digital conversion circuits.

Abstract: A solid-state imaging element synthesizes luminance signals and chrominance signals to obtain an image. The solid-state imaging element includes a plurality of first pixels and a plurality of second pixels. Each of the plurality of second pixels has a spectral response characteristic in white. The solid-state imaging element generates the chrominance signals, using output signals from the plurality of first pixels. The solid-state imaging element generates the luminance signals, using output signals from the plurality of second pixels, without using the output signals from the plurality of first pixels.

Abstract: An AD conversion circuit provided in a solid-state image sensor includes a counter circuit that performs count processing and a first latch circuit that holds at least one of a discrimination result of a first comparison circuit and a first output result of the counter circuit.

Abstract: An AD conversion circuit provided in a solid-state image sensor includes a counter circuit that performs count processing and a first latch circuit that holds at least one of a discrimination result of a first comparison circuit and a first output result of the counter circuit.

Abstract: An AD converter includes a comparator that compares a potential of a pixel signal line with a reference potential that is a potential of a ramp waveform changing with time, a counter that stops a counting operation in response to a change in an output of the comparator, and an all-bit latch unit that holds all bits of a count value subsequent to stopping the counting operation during the second count period. The counter sets an initial value for the counting operation during the first count period to be a negative value, and prior to the counting operation during the second count period, inverts all bits of the count value subsequent to stopping the counting operation during the first count period.

Abstract: [Object] To prevent code skipping in decoding. [Solution] Included are a low-order bit latch unit (63) that latches digital code data as a low-order bit, a high-order bit counter unit (64) that counts one or both of edges of a control signal corresponding to a reference clock, and stops counting of high-order bits, triggered by output of a comparator (62) being inverted, a low-order bit decoding signal latch unit (65) that latches a low-order bit decoding signal, and a signal processing unit (8).

Abstract: [Object] To prevent code skipping in decoding. [Solution] Included are a low-order bit latch unit (63) that latches digital code data as a low-order bit, a high-order bit counter unit (64) that counts one or both of edges of a control signal corresponding to a reference clock, and stops counting of high-order bits, triggered by output of a comparator (62) being inverted, a low-order bit decoding signal latch unit (65) that latches a low-order bit decoding signal, and a signal processing unit (8).

Abstract: An AD converter includes a comparator that compares a potential of a pixel signal line with a reference potential that is a potential of a ramp waveform changing with time, a counter that stops a counting operation in response to a change in an output of the comparator, and an all-bit latch unit that holds all bits of a count value subsequent to stopping the counting operation during the second count period. The counter sets an initial value for the counting operation during the first count period to be a negative value, and prior to the counting operation during the second count period, inverts all bits of the count value subsequent to stopping the counting operation during the first count period.

Abstract: Provided are a solid-state imaging element which can be simply manufactured and can control movement of electric charges in an accumulation region with a high degree of accuracy, and a method of manufacturing the same. A solid-state imaging element (1a) includes a substrate (11) having a first conductivity type; an accumulation region (12) having a second conductivity type and provided in the substrate (11); a read-out region (13) for receiving the transferred electric charges accumulated in the accumulation region (12); and a transfer section (14) for transferring the electric charges from the accumulation region (12) to the read-out region (13). An impurity concentration modulation region 121 having a locally high concentration of an impurity having the second conductivity type, or having a locally low concentration of an impurity having the first conductivity type is formed in a part of the accumulation region (12).

Abstract: A means for correcting tilts and positional deviations from a stereo image is rendered unnecessary. The present invention has a solid-state imaging element 2 on which a plurality of light receiving sections for photoelectrically converting and imaging an image light from a subject are arranged in a matrix pattern and a lens means 3 with a single focal point on an imaging surface of the solid-state imaging element 2. The present invention is configured to simultaneously or chronologically expose and image each imaging light from a subject entering different positions of the lens means 3 as a plurality of images in a plurality of imaging regions for each predetermined imaging regions of the solid-state imaging element 2.

Abstract: Provided are a solid-state imaging element which can be simply manufactured and can control movement of electric charges in an accumulation region with a high degree of accuracy, and a method of manufacturing the same. A solid-state imaging element (1a) includes a substrate (11) having a first conductivity type; an accumulation region (12) having a second conductivity type and provided in the substrate (11); a read-out region (13) for receiving the transferred electric charges accumulated in the accumulation region (12); and a transfer section (14) for transferring the electric charges from the accumulation region (12) to the read-out region (13). An impurity concentration modulation region 121 having a locally high concentration of an impurity having the second conductivity type, or having a locally low concentration of an impurity having the first conductivity type is formed in a part of the accumulation region (12).

Abstract: A means for correcting tilts and positional deviations from a stereo image is rendered unnecessary. The present invention has a solid-state imaging element 2 on which a plurality of light receiving sections for photoelectrically converting and imaging an image light from a subject are arranged in a matrix pattern and a lens means 3 with a single focal point on an imaging surface of the solid-state imaging element 2. The present invention is configured to simultaneously or chronologically expose and image each imaging light from a subject entering different positions of the lens means 3 as a plurality of images in a plurality of imaging regions for each predetermined imaging regions of the solid-state imaging element 2.