Patents by Inventor Takeru Takushima

Takeru Takushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8877643
    Abstract: This invention is to provide a method of polishing a silicon wafer wherein a high flatness can be attained likewise the conventional polishing method and further the occurrence of defects due to the remaining of substances included in the polishing solution on the surface of the wafer can be suppressed as well as a polished silicon wafer. The method of polishing a silicon wafer by supplying a polishing solution containing abrasive grains onto a surface of a polishing pad and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, is characterized in that the number of abrasive grains included in the polishing solution is controlled to not more than 5×1013 grains/cm3.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: November 4, 2014
    Assignee: Sumco Corporation
    Inventors: Shuhei Matsuda, Tetsuro Iwashita, Ryuichi Tanimoto, Takeru Takushima, Takeo Katoh
  • Publication number: 20130095660
    Abstract: To final polish a finish-polished surface using a final polishing solution whose chief component is a weakly basic aqueous solution that does not contain abrasive grains. During the final polishing, the weakly basic aqueous solution having an alkali concentration that reduces a haze value of a final-polished surface below the haze value of the finish-polished surface of the wafer is used as the chief component of the final polishing solution.
    Type: Application
    Filed: July 1, 2011
    Publication date: April 18, 2013
    Applicant: SUMCO CORPORATION
    Inventors: Ryuichi Tanimoto, Shinya Sadohara, Takeru Takushima
  • Publication number: 20120080775
    Abstract: This invention is to provide a method of polishing a silicon wafer wherein a high flatness can be attained likewise the conventional polishing method and further the occurrence of defects due to the remaining of substances included in the polishing solution on the surface of the wafer can be suppressed as well as a polished silicon wafer. The method of polishing a silicon wafer by supplying a polishing solution containing abrasive grains onto a surface of a polishing pad and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, is characterized in that the number of abrasive grains included in the polishing solution is controlled to not more than 5×1013 grains/cm3.
    Type: Application
    Filed: May 28, 2010
    Publication date: April 5, 2012
    Inventors: Shuhei Matsuda, Tetsuro Iwashita, Ryuichi Tanimoto, Takeru Takushima, Takeo Katoh
  • Patent number: 8147295
    Abstract: A silicon wafer is polished by applying a polishing solution substantially containing no abrasive grain onto a surface of a polishing pad having a given fixed grain bonded abrasive and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, wherein a hydroplane layer is formed by the polishing solution supplied between the surface of the silicon wafer and the surface of the polishing pad and a thickness of the hydroplane layer is controlled to change a polishing state of the surface of the silicon wafer.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: April 3, 2012
    Assignee: Sumco Corporation
    Inventors: Takeo Katoh, Ryuichi Tanimoto, Shinichi Ogata, Takeru Takushima, Kazushige Takaishi
  • Publication number: 20090298394
    Abstract: A silicon wafer is polished by applying a polishing solution substantially containing no abrasive grain onto a surface of a polishing pad having a given fixed grain bonded abrasive and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, wherein a hydroplane layer is formed by the polishing solution supplied between the surface of the silicon wafer and the surface of the polishing pad and a thickness of the hydroplane layer is controlled to change a polishing state of the surface of the silicon wafer.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 3, 2009
    Applicant: SUMCO CORPORATION
    Inventors: Takeo Katoh, Ryuichi Tanimoto, Shinichi Ogata, Takeru Takushima, Kazushige Takaishi