Patents by Inventor Takeshi Hara

Takeshi Hara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9491536
    Abstract: Provided is a headphone driver including a yoke that has a bottom surface and an erected surface that is erected in a perpendicular direction with respect to the bottom surface, and that is formed using a magnetic material, and a bonded magnet unit consisting of a bonded magnet that is provided on the bottom surface of the yoke. The magnetic flux of the bonded magnet unit is concentrated on the side surface of the bonded magnet unit facing the erected surface of the yoke.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: November 8, 2016
    Assignee: Sony Corporation
    Inventors: Koji Nageno, Takeshi Hara
  • Publication number: 20160262686
    Abstract: Provided is an apparatus for measuring the thickness, roughness, and morphology index of the mandibular cortical bone using a dental panorama image to assist in the diagnosis of osteoporosis, wherein the thickness, roughness, and morphological index of the cortical bone is measured more accurately and the diagnosis of osteoporosis can be supported more accurately. An osteoporosis diagnostic support apparatus, wherein the apparatus has a contour extraction unit adapted to extract a mandibular contour from an image of a mandibular cortical bone photographed by a photographic apparatus adapted to photograph the mandibular cortical bone and surroundings thereof, a line segment extraction unit adapted to extract line segments from the image of the mandibular cortical bone photographed by the photographic apparatus; and a cortical bone thickness calculation unit adapted to calculate a thickness of the cortical bone based on the extracted mandibular contour and line segments.
    Type: Application
    Filed: May 23, 2016
    Publication date: September 15, 2016
    Applicants: Media Co., Ltd., Gifu University
    Inventors: Hironobu TSUJI, Yosuke TSUJI, Tatsuro HAYASHI, Hiroshi FUJITA, Takeshi HARA, Chisako MURAMATSU, Kazuki HORIBA, Akitoshi KATSUMATA
  • Patent number: 9440848
    Abstract: This disclosure provides systems, methods and apparatus including devices that include layers of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectromechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a first layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate. The disclosure further provides processes for providing a second layer of passivation material on any exposed surfaces of the thin film component after release of the microelectromechanical device.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: September 13, 2016
    Assignees: Pixtronix, Inc., Sharp Corporation, Sharp Kabushiki Kaisha
    Inventors: Teruo Sasagawa, Junghun Chae, Jasper Lodewyk Steyn, Takeshi Hara, Asahi Yamato
  • Patent number: 9366933
    Abstract: An array board (a semiconductor device) 11b includes a display area TFT (a display area transistor) 17, a non-display area TFT (a non-display area transistor) 29, an upper insulator 31, and a lower insulator 30. The display area TFT 17 is arranged in a display area AA. The non-display area TFT 29 is arranged in a non-display area NAA. The upper insulator 31 is arranged in the non-display area NAA and formed from a second interlayer insulation film 41. The lower insulator 30 is arranged in the non-display area and formed from a first interlayer insulation film 39. The lower insulator 30 is arranged below the upper insulator 31 such that they are layered.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: June 14, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Hara, Kenichi Kitoh, Hisao Ochi
  • Patent number: 9315435
    Abstract: A method comprising a step of stirring a composition containing a biphenol compound represented by the formula (1): wherein, R1 and R2 represent each independently an alkyl group having 1 to 3 carbon atoms, and m and n represent each independently an integer of 0 to 2, a secondary alcohol and a nickel catalyst, for producing a hydroxyphenylcyclohexanol compound represented by the formula (2): wherein, R1, R2, m and n represent the same meaning as described above, with the proviso that the above-described secondary alcohol has a different structure from that of the hydroxyphenylcyclohexanol compound represented by the above-described formula (2).
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: April 19, 2016
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Takeshi Hara, Yoshihiko Iwanaga
  • Patent number: 9302669
    Abstract: Provided is a control device for a hybrid vehicle, which makes it possible to manually select a degree of acceleration in tune with user's preferences and user's intended running quality. Provided is a control device for a hybrid vehicle 1 including an engine and a motor for assisting the engine with power, in which an ECU 20 is provided with a first changing unit, which prepares to increase the assist amount of the motor 12 in response to a user depressing a Plus Sport mode switch 30, and subsequently increases the assist amount of the motor 12 in response to the user pressing an accelerator pedal to cause a variation ?AP in an accelerator position to be at least a predetermined value.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: April 5, 2016
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Takeshi Hara, Terukazu Torikai, Eri Itou, Yuusuke Obata, Kazuki Takahashi, Seiji Takaya, Satoshi Uchino
  • Publication number: 20160090299
    Abstract: This disclosure provides systems, methods and apparatus including devices that include layers of passivation material covering at least a portion of an exterior surface of a thin film component within a microelectromechanical device. The thin film component may include an electrically conductive layer that connects via an anchor to a conductive surface on a substrate. The disclosure further provides processes for providing a first layer of passivation material on an exterior surface of a thin film component and for electrically connecting that thin film component to a conductive surface on a substrate. The disclosure further provides processes for providing a second layer of passivation material on any exposed surfaces of the thin film component after release of the microelectromechanical device.
    Type: Application
    Filed: May 28, 2015
    Publication date: March 31, 2016
    Inventors: Teruo Sasagawa, Junghun Chae, Jasper Lodewyk Steyn, Takeshi Hara, Asahi Yamato
  • Patent number: 9177974
    Abstract: An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: November 3, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Hinae Mizuno, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto
  • Publication number: 20150303307
    Abstract: This semiconductor device is provided with: a semiconductor film that comprises an oxide semiconductor, and includes a channel region; a first inorganic insulating film formed on the semiconductor film; a first organic insulating film formed on the first inorganic insulating film; and an inorganic film group. The inorganic film group has: a first electrode comprising an inorganic conductive film formed on the first organic insulating film; a second inorganic insulating film formed on the first electrode; and a second electrode that comprises an inorganic conductive film formed on the second inorganic insulating film, and is electrically connected to the semiconductor film via openings formed in such a manner as to penetrate the first inorganic insulating film, the first organic insulating film, the first electrode and the second inorganic insulating film. The first organic insulating film is disposed between the first inorganic insulating film and the inorganic film group.
    Type: Application
    Filed: September 30, 2013
    Publication date: October 22, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi HARA, Hirohiko NISHIKI, Izumi ISHIDA, Shogo MURASHIGE
  • Publication number: 20150286082
    Abstract: A liquid crystal display device, which includes: a liquid crystal layer; and a first substrate and a second substrate that are arranged so as to face each other with the liquid crystal layer being sandwiched therebetween. On the liquid crystal layer side of the first substrate, there are provided: a plurality of first thin film transistors that are arranged in a display region; a peripheral drive circuit which includes a plurality of second thin film transistors and is arranged in the periphery of the display region so as to supply drive signals to the plurality of first thin film transistors; an organic insulating film that is formed so as to cover the plurality of first thin film transistors and the plurality of second thin film transistors; and an inorganic insulating film that is formed on the organic insulating film.
    Type: Application
    Filed: November 20, 2013
    Publication date: October 8, 2015
    Inventors: Hirohiko Nishiki, Takeshi Hara, Tohru Okabe
  • Publication number: 20150287799
    Abstract: The present invention suppresses electrochemical corrosion in a TFT between an oxide conductor and a source/drain wiring line containing aluminum. In this semiconductor device, a gate layer containing a gate line and a gate electrode is formed on a substrate, and a semiconductor layer made of an oxide semiconductor is formed so as to overlap the gate electrode of the gate layer, with a gate insulating film therebetween. A source electrode and a drain electrode are formed by spacing apart a source wiring layer on the semiconductor layer. The source wiring layer is configured by laminating first conductive layers made of Al and a second conductive layer constituted by a metal film made of a metal other than an amphoteric metal. The drain electrode and a pixel electrode are electrically connected to each other via a contact hole in protective layers formed on the source wiring layer.
    Type: Application
    Filed: September 18, 2013
    Publication date: October 8, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shogo Murashige, Takeshi Hara, Hirohiko Nishiki, Izumi Ishida
  • Publication number: 20150275030
    Abstract: An object of the present invention is to provide an efficient transportation of an emulsion for a cationic electrodeposition coating composition, and to reduce transportation costs significantly. The present invention provides a method for preparing an emulsion for a cationic electrodeposition coating composition at an emulsification field, wherein the method comprises: synthesizing a base resin for a cationic electrodeposition coating composition, changing the resin into a solid state after removing the base resin in a liquid state from a reaction vessel, and if necessary, adjusting a size of the resin into an appropriate size, and emulsifying the resin at the emulsification field by adding water and an optional solvent, a neutralizing agent, a curing agent or additives.
    Type: Application
    Filed: March 24, 2015
    Publication date: October 1, 2015
    Inventors: Takeshi Hara, Nobuhiro Miyamae, Makoto Andou, Masahiko Harada, Noriyuki Nakazawa
  • Publication number: 20150279865
    Abstract: This semiconductor device is provided with: a semiconductor film made of an oxide semiconductor film and having a channel region; a first insulating film that is formed on the semiconductor film in a form that covers the channel region; and a first electrode that is electrically connected to the semiconductor film via an opening formed in a location that does not overlap with the channel region in the first insulating film, and has an overlapping portion that overlaps with at least the semiconductor film on the first insulating film.
    Type: Application
    Filed: September 30, 2013
    Publication date: October 1, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Shogo Murashige
  • Publication number: 20150255616
    Abstract: This semiconductor device is provided with: a semiconductor film that comprises an oxide semiconductor film, and has a channel region; a protective film that is formed on the semiconductor film in a form that covers the channel region; a first inorganic insulating film that is formed on the protective film in a form having an area that overlaps with the channel region; and an organic insulating film that comprises a resin film formed on the first inorganic insulating film, and has a first opening that exposes the first inorganic insulating film in the area that overlaps with the channel region.
    Type: Application
    Filed: September 30, 2013
    Publication date: September 10, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Shogo Murashige
  • Publication number: 20150241724
    Abstract: An array board (a semiconductor device) 11b includes a display area TFT (a display area transistor) 17, a non-display area TFT (a non-display area transistor) 29, an upper insulator 31, and a lower insulator 30. The display area TFT 17 is arranged in a display area AA. The non-display area TFT 29 is arranged in a non-display area NAA. The upper insulator 31 is arranged in the non-display area NAA and formed from a second interlayer insulation film 41. The lower insulator 30 is arranged in the non-display area and formed from a first interlayer insulation film 39. The lower insulator 30 is arranged below the upper insulator 31 such that they are layered.
    Type: Application
    Filed: September 13, 2013
    Publication date: August 27, 2015
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Hara, Kenichi Kitoh, Hisao Ochi
  • Publication number: 20150233304
    Abstract: Provided is an internal combustion engine control system capable of simultaneously and suitably carrying out the will of a driver to accelerate and modifications to the throttle opening degree characteristics. An internal combustion engine control system is provided with an accelerator pedal operation amount sensor for detecting the accelerator pedal operation amount, a storage unit for storing multiple different throttle opening degree characteristics of an engine relative to the accelerator pedal operation amount, a switch for selecting the throttle opening degree characteristic pertaining to a plus sports mode in response to an operation, and an engine control unit for controlling the throttle opening degree of the engine on the basis of the selected throttle opening degree characteristic and the detected accelerator pedal operation amount.
    Type: Application
    Filed: September 3, 2013
    Publication date: August 20, 2015
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Takeshi Hara, Terukazu Torikai, Eri Itou, Yuusuke Obata, Hideki Takahashi
  • Publication number: 20150221677
    Abstract: The present invention provides an active matrix substrate including a thin film transistor that sufficiently achieves high reliability and a low capacitance, a production method for the active matrix substrate without an increase in the number of photomasks, a display device including the active matrix substrate, and a production method for the display device. The active matrix substrate of the present invention includes a thin film transistor that includes a semiconductor layer consisting of an oxide semiconductor. The active matrix substrate includes at least the semiconductor layer consisting of the oxide semiconductor, an etching stopper layer, and an interlayer insulating film formed from a spin-on-glass material. In the plan view of the principal surface of the substrate, the etching stopper layer covers at least part of the semiconductor layer, and the interlayer insulating film covers at least part of the etching stopper layer.
    Type: Application
    Filed: September 17, 2013
    Publication date: August 6, 2015
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Hara, Kenichi Kitoh, Hisao Ochi
  • Publication number: 20150214374
    Abstract: The present invention provides a circuit substrate and a display device in which oxide semiconductor layers that TFTs include are produced according to areas where the oxide semiconductor layers are present, whereby the reliability thereof is sufficiently enhanced. This circuit substrate is a circuit substrate obtained by arranging semiconductor elements on a transparent substrate, each of the semiconductor elements including an oxide semiconductor layer. The circuit substrate includes a protective film arranged above the semiconductor element, and an organic insulating film arranged above the protective film. The organic insulating films have openings above at least a part of oxide semiconductor layers.
    Type: Application
    Filed: August 26, 2013
    Publication date: July 30, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Tohru Okabe, Manabu Daio
  • Publication number: 20150202127
    Abstract: The present invention provides a body odor suppressing agent that contains activated carbon and that has excellent body odor suppressing effects, causes no black soiling on an object to be coated, and has excellent practical aptitude. The present invention also provides a body odor suppressing agent having an excellent feeling of use when the agent is applied to the skin. The present invention further provides a body odor suppressing agent capable of preventing nozzles from clogging when the agent is packed into a spray container and used. The body odor suppressing agent of the present invention includes a titanium oxide-coated activated carbon including an activated carbon having an average particle diameter of 15 to 50 ?m and a titanium oxide present over the surface of the activated carbon.
    Type: Application
    Filed: December 4, 2013
    Publication date: July 23, 2015
    Inventors: Takeshi Hara, Hironori Shimizu
  • Patent number: 9087749
    Abstract: An active matrix substrate (20a) includes a gate electrode (25) formed on an insulating substrate (10a), and a planarizing film (26) formed on the gate electrode (25) and made of a baked SOG material. The gate electrode (25) is a multilayer film including a first conductive film (27) formed on the insulating substrate (10a) and made of a metal except copper, a second conductive film (28) formed on the first conductive film (27) and made of copper, and a third conductive film (29) formed on the second conductive film (28) and made of the metal except copper.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: July 21, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Hisao Ochi, Tetsuya Aita, Tohru Okabe, Yuya Nakano