Patents by Inventor Takeshi Inui

Takeshi Inui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11174195
    Abstract: Provided is an etching method for a glass, including an etching step (S2) of immersing a glass (G) in an etching liquid (E) to subject the glass (G) to etching treatment. The etching step (S2) includes causing the etching liquid (E) to relatively flow with respect to a surface (MS) of the glass (G), to thereby subject the glass (G) to the etching treatment.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: November 16, 2021
    Assignee: NIPPON ELECTRIC GLASS CO., LTD.
    Inventors: Yoshiyuki Sakade, Hiroaki Nakahori, Takeshi Inui
  • Publication number: 20200156990
    Abstract: Provided is an etching method for a glass, including an etching step (S2) of immersing a glass (G) in an etching liquid (E) to subject the glass (G) to etching treatment. The etching step (S2) includes causing the etching liquid (E) to relatively flow with respect to a surface (MS) of the glass (G), to thereby subject the glass (G) to the etching treatment.
    Type: Application
    Filed: August 27, 2018
    Publication date: May 21, 2020
    Applicant: Nippon Electric Glass Co., Ltd.
    Inventors: Yoshiyuki SAKADE, Hiroaki NAKAHORI, Takeshi INUI
  • Patent number: 7953014
    Abstract: Network device testing equipment capable of testing network devices using small size packets and for a transferring ability and a filtering ability at a media speed is described. A configuration is adopted in which a Field Programmable Gate Array (FPGA) included in a transmitter or receiver on one or both of transmitting and receiving sides is connected directly to a physical layer chip of a network and computers on both the transmitting and receiving sides are connected thereto. Each of the FPGAs of the transmitter and receiver has a circuit which has an integrated function of transmitting a packet pattern generation function and a packet-receiving function, thereby enabling a test and an inspection in real time. When inspecting the filtering function, a hash table storing therein a hash value and a list of occurrence frequencies for hash values is utilized.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: May 31, 2011
    Assignees: National Institute of Advanced Industrial Science and Technology, DUAXES Corporation, BITS Co., Ltd.
    Inventors: Kenji Toda, Toshihiro Katashita, Kazumi Sakamaki, Takeshi Inui, Mitsugu Nagoya, Yasunori Terashima
  • Patent number: 7590916
    Abstract: A CRC value calculator enables throughput to be improved while keeping down the increase in the size of the circuitry. This is achieved by using (n+1) basic CRC circuits to configure a CRC value calculator in which the width of the data processed during one clock cycle is m2n bits. For example, when m2n bits is the data width processed per calculator cycle, the CRC value calculator of this invention is configured by using selectors to serially connect a CRC circuit that processes every m2n bits, a CRC circuit that processes every m2(n?1) bits, . . . , and a CRC circuit that processes every m20 bits. This configuration makes it possible to calculate a correct CRC value even when the remainder of an input network frame is not a multiple of m2n bits. Selectors are used to select CRC circuit output according to process data width. Reduction of the operating frequency is avoided by using registers to form a pipeline between CRC circuits.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: September 15, 2009
    Inventors: Toshihiro Katashita, Kenji Toda, Kazumi Sakamaki, Takeshi Inui, Tadamasa Takayama, Mitsugu Nagoya, Yasunori Terashima
  • Publication number: 20070136411
    Abstract: A CRC value calculator enables throughput to be improved while keeping down the increase in the size of the circuitry. This is achieved by using (n+1) basic CRC circuits to configure a CRC value calculator in which the width of the data processed during one clock cycle is m2n bits. For example, when m2n bits is the data width processed per calculator cycle, the CRC value calculator of this invention is configured by using selectors to serially connect a CRC circuit that processes every m2n bits, a CRC circuit that processes every m2(n?1) bits, . . . , and a CRC circuit that processes every m20 bits. This configuration makes it possible to calculate a correct CRC value even when the remainder of an input network frame is not a multiple of m2n bits. Selectors are used to select CRC circuit output according to process data width. Reduction of the operating frequency is avoided by using registers to form a pipeline between CRC circuits.
    Type: Application
    Filed: June 9, 2006
    Publication date: June 14, 2007
    Inventors: Toshihiro Katashita, Kenji Toda, Kazumi Sakamaki, Takeshi Inui, Tadamasa Takayama, Mitsugu Nagoya, Yasunori Terashima
  • Publication number: 20070067130
    Abstract: Network device testing equipment capable of testing network devices using small size packets and for a transferring ability and a filtering ability at a media speed is described. A configuration is adopted in which a Field Programmable Gate Array (FPGA) included in a transmitter or receiver on one or both of transmitting and receiving sides is connected directly to a physical layer chip of a network and computers on both the transmitting and receiving sides are connected thereto. Each of the FPGAs of the transmitter and receiver has a circuit which has an integrated function of transmitting a packet pattern generation function and a packet-receiving function, thereby enabling a test and an inspection in real time. When inspecting the filtering function, a hash table storing therein a hash value and a list of occurrence frequencies for hash values is utilized.
    Type: Application
    Filed: March 7, 2006
    Publication date: March 22, 2007
    Inventors: Kenji Toda, Toshihiro Katashita, Kazumi Sakamaki, Takeshi Inui, Mitsugu Nagoya, Yasunori Terashima
  • Patent number: 6674362
    Abstract: A main controller for controlling an emergency informing terminal, and a sub controller for controlling communications with an external device are provided. The main controller and sub controller have microcomputers, and the main controller and sub controller monitor the operation of each other. If the other is abnormal, a reset signal is issued to initialize it, and if still abnormal, the history of abnormality is recorded, and the abnormality is informed to the user by means of sound or light. The power source device of this emergency informing terminal has a function of cutting off power supply to the emergency informing terminal when overheat or overcurrent occurs in the auxiliary battery which operate when supply from the main battery is interrupted, and if overheat or voltage drop occurs due to short circuit of the auxiliary battery or other trouble, power supply into the emergency informing terminal is cut off, so that spread of damage may be avoided.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: January 6, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Yoshioka, Takeshi Inui, Takayuki Tanahashi, Toshiyuki Shimizu
  • Patent number: 6440601
    Abstract: A plurality of cells are disposed in close contact with each other with their longitudinal axes parallel to each other, and their electrode terminals that are juxtaposed at one end are electrically connected to each other with a connector piece. These cells thus joined together are inserted into and held within a frame body formed in one-piece with a pair of end face covers, connecting bar, and retaining piece, or alternatively, inserted into and held within a cell casing having a pair of end face covers, bottom wall, and partition boss formed integrally therewith.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: August 27, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takayuki Aoi, Takeshi Inui, Yukihiro Gotanda, Daisuke Yoshida, Takae Okazaki
  • Publication number: 20020075165
    Abstract: A main controller for controlling an emergency informing terminal, and a sub controller for controlling communications with an external device are provided. The main controller and sub controller have microcomputers, and the main controller and sub controller monitor the operation of each other. If the other is abnormal, a reset signal is issued to initialize it, and if still abnormal, the history of abnormality is recorded, and the abnormality is informed to the user by means of sound or light.
    Type: Application
    Filed: August 3, 2001
    Publication date: June 20, 2002
    Inventors: Kenji Yoshioka, Takeshi Inui, Takayuki Tanahashi, Toshiyuki Shimizu
  • Patent number: 6391490
    Abstract: A battery has one terminal on a sealing assembly fitted to one open end of the cell casing, and the other terminal on the exterior surface of the cell casing such as to extend along the entire circular circumferential surface of a predetermined width. The other end of the cell casing opposite from the terminal is electrically insulated by affixing nonconductive films thereto. Two heat-shrinkable nonconductive labels are wound around and bonded to the cell casing, so that the terminal is formed in a recessed, ring-like form between the heat-shrinkable nonconductive labels.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: May 21, 2002
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Takayuki Aoi, Takeshi Inui, Takayuki Tanahashi, Toru Hitomi, Ryuichiro Ebi
  • Patent number: 6042625
    Abstract: In a battery comprising a spirally wound electrode group, a lead plate drawn from one electrode of the electrode group and connected to the inner bottom surface of the battery case in electrically conducting relationship, and an insulating plate interposed between the lead plate and the electrode group, at least the bottom surface of the insulating plate is formed from a heat weldable material, and the lead plate is heat-welded to this heat weldable material. This construction not only serves to completely prevent accidental short-circuiting, but enables high-speed assembling of batteries.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: March 28, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Fumio Daio, Hiroaki Yoshino, Yoshimitsu Kaneda, Takayuki Tanahashi, Toshiyuki Shimizu, Takeshi Inui
  • Patent number: 5965290
    Abstract: A non-aqueous electrolyte cell has an electrode assembly including a negative electrode strip, a positive electrode strip having an active cathode material, and a separator. The positive electrode strip and the negative electrode strip are superposed with the separator therebetween and wound in a spiral. The negative electrode strip is disposed outside the positive electrode strip and has an outermost winding, a negative electrode strip winding end, and a penultimate winding. The positive electrode strip has an outermost winding terminating at a positive electrode strip winding end. An anode current collector contacts the negative electrode strip on the penultimate winding and is radially aligned with a portion of the outermost winding of the positive electrode strip.
    Type: Grant
    Filed: August 13, 1997
    Date of Patent: October 12, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Shimizu, Fumio Daio, Takeshi Inui
  • Patent number: 5912091
    Abstract: In a battery comprising a spirally wound electrode group, a lead plate drawn from one electrode of the electrode group and connected to the inner bottom surface of the battery case in electrically conducting relationship, and an insulating plate interposed between the lead plate and the electrode group, at least the bottom surface of the insulating plate is formed from a heat weldable material, and the lead plate is heat-welded to this heat weldable material. This construction not only serves to completely prevent accidental short-circuiting, but enables high-speed assembling of batteries.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: June 15, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Fumio Daio, Hiroaki Yoshino, Yoshimitsu Kaneda, Takayuki Tanahashi, Toshiyuki Shimizu, Takeshi Inui