Abstract: The object of the invention is to provide an automatic analysis apparatus which is capable of both sterilizing a reagent and suppressing property variations in the reagent. Provided is an automatic analysis apparatus including a reagent vessel which holds a reagent; a suction nozzle which sucks the reagent; an analysis unit which executes an analysis operation by adding a reagent sucked from the reagent vessel to a specimen via the suction nozzle; an ultraviolet ray source which sterilizes a reagent by ultraviolet irradiation; and an electrode or a substrate which supplies electric power to the ultraviolet ray source, in which a heat insulation portion is arranged between a reagent in the suction nozzle and the ultraviolet ray source and the electrode or the substrate, or, it is isolated between a reagent in the suction nozzle and the ultraviolet ray source and the electrode or the substrate.

Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type that has a main surface and that includes a device region, a base region of a second conductivity type that is formed in a surface layer portion of the main surface at the device region, a source region of the first conductivity type that is formed in a surface layer portion of the base region at an interval inward from a peripheral portion of the base region and that defines a channel region with the semiconductor layer, a base contact region of the second conductivity type that is formed in a region different from the source region at the surface layer portion of the base region and that has an impurity concentration exceeding an impurity concentration of the base region, a well region of the first conductivity type that is formed in the surface layer portion of the main surface at an interval from the base region at the device region and that defines a drift region with the base region, a drain region of the first conductivi

Abstract: A light-emitting device includes at least one light-emitting region. The at least one light-emitting region includes: a lower electrode in plan view; an upper electrode provided across from at least one lower electrode including the lower electrode; and a plurality of functional layers stacked on top of another between the lower electrode and the upper electrode. The plurality of functional layers include at least: a light-emitting layer provided between the lower electrode and the upper electrode; and a first functional layer provided between the lower electrode and the light-emitting layer, and adjacent to the light-emitting layer. The light-emitting layer contains quantum dots, ligands, and a photo-crosslinking agent. The first functional layer contains a photocurable resin. An end face of the light-emitting layer and an end face of the first functional layer are flush with each other.

Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type that has a main surface and that includes a device region, a base region of a second conductivity type that is formed in a surface layer portion of the main surface at the device region, a source region of the first conductivity type that is formed in a surface layer portion of the base region at an interval inward from a peripheral portion of the base region and that defines a channel region with the semiconductor layer, a base contact region of the second conductivity type that is formed in a region different from the source region at the surface layer portion of the base region and that has an impurity concentration exceeding an impurity concentration of the base region, a well region of the first conductivity type that is formed in the surface layer portion of the main surface at an interval from the base region at the device region and that defines a drift region with the base region, a drain region of the first conductivi

Abstract: The present invention provides a DNA detection method comprising: a first step of dividing a specimen solution containing a fluorescent-labeled probe or a DNA intercalator and multiple types of DNA to be detected into a plurality of aliquots; a second step of performing PCR in microcompartments, each containing one of the aliquots; a third step of measuring fluorescence intensity from the fluorescent-labeled probe or the DNA intercalator in each of the microcompartments as temperature changes; a fourth step of calculating a melting temperature of the multiple type of DNA to be detected from each measured fluorescence intensity; a fifth step of identifying any microcompartment affected by one or more bubbles; and a sixth step of excluding data obtained for the microcompartment affected by one or more bubbles from all data obtained for the plurality of microcompartments.

Abstract: Provided is a gene analysis method including performing a single-base extension reaction using a primer for a single-base extension reaction for detection of a target nucleotide sequence, and a substrate for a single-base extension reaction having a fluorescent dye; subjecting a reaction product of the single-base extension reaction to electrophoresis; and measuring mobility of the electrophoresis and fluorescence intensity of the fluorescent dye, and detecting a wild type and a mutant of the target nucleotide sequence based on the fluorescence intensity. Also provided is a kit for use in the gene analysis method disclosed herein.

Abstract: An enhancement type MOSFET includes: a semiconductor layer having a first main surface on one side and a second main surface on another side, and having a p-type region in a surface layer region on the side of the first main surface; an n-type source region and an n-type drain region formed at an interval from each other in a surface layer region of the p-type region; a channel region formed between the n-type source region and the n-type drain region; a gate insulating film disposed on the channel region; and a polysilicon gate formed on the gate insulating film, wherein at least a main portion of the polysilicon gate is made of non-doped polysilicon.

Abstract: An imaging system images measurement targets arranged on a plane and includes a light source that irradiates the measurement targets with light, a photodetector that detects light from the measurement targets, one or more lenses, an adjustment mechanism that focuses imaging on the measurement targets, and a drive mechanism that changes the relative position of the photodetector and the measurement targets. The measurement targets have the same shape and size and are arranged at equal pitches in a longitudinal direction and a lateral direction on the plane, based on a value obtained by multiplying the pitch of the measurement targets by an imaging magnification that is an integer multiple of two or more times of a pixel pitch of the photodetector. In the changing of the relative position by the drive mechanism, an adjustment unit of an imaging range is equal to or less than the pixel pitch.

Abstract: A semiconductor device includes: a first conductivity type substrate; a second conductivity type semiconductor layer formed over the substrate; a second conductivity type drift region formed at a surface portion of the semiconductor layer; a second conductivity type drain region formed at the drift region; a first conductivity type body region formed adjacent to the drift region at the surface portion of the semiconductor layer; a second conductivity type source region formed at the body region; and a first conductivity type resurf layer that expands from a center of the drain region to both sides in a lateral direction along a main surface of the semiconductor device to entirely cover the drift region.

Abstract: A filter circuit includes a housing made of a conductor and comprising an input port and an output port, each of which comprises an outer conductor and an inner conductor, wherein the housing is configured to have a ground potential together with the outer conductors of the input port and the output port, a first protrusion made of a conductor and connected to the housing, wherein the first protrusion is configured to protrude into the housing, and a power supply line provided within the housing and insulated from the housing. The power supply line includes an input-side conductor which is the inner conductor of the input port, an output-side conductor which is the inner conductor of the output port, and an antenna connected to the input-side conductor and the output-side conductor and formed to surround the first protrusion.

Abstract: A semiconductor device 1 includes a p type substrate 4, an n type semiconductor layer 5 that is formed on the p type substrate, and a transistor 40 with the n type semiconductor layer as a drain, the transistor includes a p type well region 15 that is formed in a surface layer portion of the n type semiconductor layer and has an n type source contact region in a surface layer portion thereof and an n type drain contact region 14 that is formed in the surface layer portion of the n type semiconductor layer and is disposed at an interval from the p type well region 15, and, inside the n type semiconductor layer, a p type embedded layer 10 is formed below the p type well region.

Abstract: An electrophotographic photoreceptor includes a photosensitive layer on a support, wherein the photosensitive layer includes at least a charge generating layer, a charge transporting layer, and a protective layer, the charge generating layer contains titanyl phthalocyanine or a derivative thereof, the charge transporting layer contains a charge transporting material, the protective layer contains a reactant of a polymerizable monomer having a charge transporting structure and a polymerizable monomer having no charge transporting structure, and the charge transporting material, and a ratio of the mass of the charge transporting material contained in the protective layer is greater than 3% by mass and less than 9% by mass with respect to the total mass of a reactant of the polymerizable monomer having the charge transporting structure and the polymerizable monomer having no charge transporting structure, and the charge transporting material.

Abstract: A semiconductor device 1 includes a base body 3 that includes a p type substrate 4 and an n type semiconductor layer 5 formed on the p type substrate 4 and includes an element region 2 having a transistor 40 with the n type semiconductor layer as a drain, a p type element isolation region 7 that is formed in a surface layer portion of the base body such as to demarcate the element region, and a conductive wiring 25 that is disposed on a peripheral edge portion of the element region and is electrically connected to the n type semiconductor layer. The transistor includes an n+ type drain contact region 14 that is formed in a surface layer portion of the n type semiconductor layer in the peripheral edge portion of the element region. The conductive wiring is disposed such as to cover at least a portion of an element termination region 30 between the n+ type drain contact region and the p type element isolation region.

Abstract: A display device includes a light-emitting element layer including a plurality of light-emitting elements. The light-emitting element layer includes, for each of the plurality of light-emitting elements, a first electrode and a plurality of openings exposing the first electrode, and includes an edge cover covering an end portion of the first electrode, a plurality of light-emitting layers covering each of the plurality of openings, and a second electrode that is common to the plurality of light-emitting elements and covers the plurality of light-emitting layers. The second electrode includes a metal nanowire. Furthermore, the light-emitting element layer includes an auxiliary wiring line provided in a lattice pattern in a position overlapping the edge cover, and the auxiliary wiring line and the metal nanowire are electrically connected to each other.

Abstract: A semiconductor device includes: a base including a p-type substrate, an n-type semiconductor layer formed on the p-type substrate, and an element region having a transistor provided with a source region and a drain region, which are formed at an interval in a surface layer portion of the n-type semiconductor layer; and a p-type element isolation region formed in a surface layer portion of the base so as to partition the element region, and having an endless shape in a plan view, wherein the n-type semiconductor layer in the element region has a property that an n-type impurity concentration increases stepwise or continuously from a surface of the n-type semiconductor layer toward the p-type substrate over an entire region along a surface of the p-type substrate.

Abstract: A broadband light source device in a biochemical analyzing device, and facilitates maintenance thereof, including an LED substrate that is provided with an LED chip generating a light beam having a first wavelength band and including a fluorescent substance in the light beam having a first wavelength band and that is provided with an LED chip generating a light beam having a second wavelength band, in which the fluorescent substance includes at least alumina and at least one of Fe, Cr, Bi, Tl, Ce, Tb, Eu, and Mn and is produced by calcining a raw material that contains sodium at 6.1 to 15.9 wt. % in the whole raw material. The broadband light source device further includes an optical system including a light pipe that color-mixes the light beam passing through the fluorescent substance of the LED chip and the light beam emitted from the LED chip, and a flat dichroic prism.

Abstract: The method includes preparing a liquid supply pipe in which the solution to be inspected, air, and oil are disposed in this order, and installing the liquid supply pipe above the substrate at an angle such that the solution to be inspected is positioned on a lowermost side and the solution to be inspected, the air, and the oil flow onto a front surface of the substrate by gravity. A cross-sectional area of the liquid supply pipe is designed such that the air continues to be present between the solution to be inspected and the oil while the solution to be inspected, the air, and the oil are flowing through the liquid supply pipe, and after the solution to be inspected is supplied to the spot, the solution to be inspected present on the front surface of the substrate is replaced with the air, and then the liquid supply progresses.

Abstract: In a red sub-pixel of a display device according to an aspect of the disclosure, an anode, a red hole-transport layer, a red light-emitting layer, an intermediate layer, an electron-transport layer, and a cathode are stacked on top of another in a stated order. A peak emission wavelength of blue quantum dots contained in the intermediate layer is shorter than a peak emission wavelength of red quantum dots contained in the red light-emitting layer.

Abstract: A plasma processing device includes: a plurality of processing chambers; a junction exhaust pipe into which a plurality of exhaust flow paths for evacuating interiors of the plurality of processing chambers joins; and a plurality of branch exhaust pipes disposed between the plurality of exhaust flow paths and the junction exhaust pipe and connecting the junction exhaust pipe to the plurality of exhaust flow paths, respectively, wherein each of the plurality of branch exhaust pipes includes a mechanism, which is disposed in a flow path of the branch exhaust pipe, to deactivate energy of hot electrons flowing through the flow path.

Abstract: A semiconductor device 1 includes a base body 3 that includes a p type substrate 4 and an n type semiconductor layer 5 formed on the p type substrate 4 and includes an element region 2 having a transistor 40 with the n type semiconductor layer as a drain, a p type element isolation region 7 that is formed in a surface layer portion of the base body such as to demarcate the element region, and a conductive wiring 25 that is disposed on a peripheral edge portion of the element region and is electrically connected to the n type semiconductor layer. The transistor includes an n+ type drain contact region 14 that is formed in a surface layer portion of the n type semiconductor layer in the peripheral edge portion of the element region. The conductive wiring is disposed such as to cover at least a portion of an element termination region 30 between the n+ type drain contact region and the p type element isolation region.