Patents by Inventor Takeshi Kikawa
Takeshi Kikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8050305Abstract: A semiconductor device having high reliability, a long lifetime and superior light emitting characteristics by applying a novel material to a p-type cladding layer is provided. A semiconductor device includes a p-type semiconductor layer on an InP substrate, in which the p-type semiconductor layer has a laminate structure formed by alternately laminating a first semiconductor layer mainly including Bex1Mgx2Znx3Te (0<x1<1, 0?x2<1, 0<x3<1, x1+x2+x3=1) and a second semiconductor layer mainly including Bex4Mgx5Znx6Te (0<x4<1, 0<x5<1, 0?x6<1, x4+x5+x6=1).Type: GrantFiled: June 3, 2008Date of Patent: November 1, 2011Assignees: Sony Corporation, Hitachi, Ltd., Sophia School CorporationInventors: Katsumi Kishino, Ichiro Nomura, Koshi Tamamura, Kunihiko Tasai, Tsunenori Asatsuma, Hitoshi Nakamura, Sumiko Fujisaki, Takeshi Kikawa
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Patent number: 7899104Abstract: An n-type cladding layer structure which has good luminescence properties without the use of substances corresponding to RoHS Directive and a high Cl-doping efficiency, i.e. which facilitates the manufacture of a semiconductor optical element and device with low crystal defects and high reliability, and an active layer and a p-type cladding layer therefor are provided. The n-type layer being lattice matched to an InP substrate and containing Group II-VI compound as a main ingredient is a Group II-VI compound semiconductor, in which the Group II elements consist of Mg, Zn, and Be and the Group VI elements consist of Se and Te. The n-type layer of the present invention is characterized by a large energy gap, high energy of the bottom of a conduction band that is effective for suppressing the Type II luminescence, high carrier concentration, and low crystal defects attributed to a good quality crystallinity.Type: GrantFiled: February 27, 2008Date of Patent: March 1, 2011Assignees: Hitachi, Ltd., Sophia School Corporation, Sony CorporationInventors: Katsumi Kishino, Ichiro Nomura, Tsunenori Asatsuma, Kunihiko Tasai, Koshi Tamamura, Hiroshi Nakajima, Hitoshi Nakamura, Sumiko Fujisaki, Takeshi Kikawa
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Patent number: 7668217Abstract: The present invention provides a Be-based group II-VI semiconductor laser using an InP substrate and having a stacked structure capable of continuous oscillation at a room temperature. A basic structure of a semiconductor laser is constituted by using a Be-containing lattice-matched II-VI semiconductor above an InP substrate. An active laser, an optical guide layer, and a cladding layer are constituted in a double hetero structure having a type I band line-up in order to enhance the injection efficiency of carriers to the active layer. Also, the active layer, the optical guide layer, and the cladding layer, which are capable of enhancing the optical confinement to the active layer, are constituted, and the cladding layer is constituted with bulk crystals.Type: GrantFiled: July 30, 2007Date of Patent: February 23, 2010Assignees: Hitachi, Ltd., Sophia School Corporation, Sony CorporationInventors: Katsumi Kishino, Ichiro Nomura, Tsunenori Asatsuma, Hitoshi Nakamura, Tsukuru Ohtoshi, Takeshi Kikawa, Sumiko Fujisaki, Shigehisa Tanaka
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Publication number: 20100040103Abstract: The present invention provides a semiconductor device including: a semiconductor layer including an n-type first cladding layer, an n-type second cladding layer, an active layer, a p-type first cladding layer, and a p-type second cladding layer in this order on an InP substrate. The n-type first cladding layer and the n-type second cladding layer satisfy formulas (1) to (4) below, or the p-type first cladding layer and the p-type second cladding layer satisfy formulas (5) to (8) below.Type: ApplicationFiled: August 5, 2009Publication date: February 18, 2010Applicants: HITACHI, LTD, SOPHIA SCHOOL CORPORATION, SONY CORPORATIONInventors: Katsumi Kishino, Ichiro Nomura, Koshi Tamamura, Kunihiko Tasai, Tsunenori Asatsuma, Hiroshi Nakajima, Hitoshi Nakamura, Sumiko Fujisaki, Takeshi Kikawa
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Publication number: 20090141763Abstract: There is disclosed a Be-containing II-VI group semiconductor laser that has a laminated structure formed on an InP substrate to continuously emit at room temperature without crystal degradation. A basic structure of the semiconductor laser is formed over the InP substrate by use of a lattice-matched II-VI group semiconductor including Be. An active layer and cladding layers are formed to be a double heterostructure with a type I band lineup, in order to increase the efficiency for injecting carriers into the active layer. The active layer and the cladding layers are also formed to enhance the light confinement to the active layer, in which the Mg composition of the p-type cladding layer is set to Mg<0.2.Type: ApplicationFiled: February 27, 2008Publication date: June 4, 2009Inventors: Katsumi Kishino, Ichiro Nomura, Tsunenori Asatsuma, Sumiko Fujisaki, Hitoshi Nakamura, Takeshi Kikawa, Shigehisa Tanaka
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Publication number: 20090059985Abstract: An n-type cladding layer structure which has good luminescence properties without the use of substances corresponding to RoHS Directive and a high Cl-doping efficiency, i.e. which facilitates the manufacture of a semiconductor optical element and device with low crystal defects and high reliability, and an active layer and a p-type cladding layer therefor are provided. The n-type layer being lattice matched to an InP substrate and containing Group II-VI compound as a main ingredient is a Group II-VI compound semiconductor, in which the Group II elements consist of Mg, Zn, and Be and the Group VI elements consist of Se and Te. The n-type layer of the present invention is characterized by a large energy gap, high energy of the bottom of a conduction band that is effective for suppress the Type II luminescence, high carrier concentration, and low crystal defects attributed to a good quality crystallinity.Type: ApplicationFiled: February 27, 2008Publication date: March 5, 2009Inventors: Katsumi Kishino, Ichiro Nomura, Tsunenori Asatsuma, Kunihiko Tasai, Koshi Tamamura, Hiroshi Nakajima, Hitoshi Nakamura, Sumiko Fujisaki, Takeshi Kikawa
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Publication number: 20090026499Abstract: A semiconductor integrated circuit device having a plurality of semiconductor electronic members including a field effect transistor, intended for suppressing a sidegating effect on the field effect transistor, wherein accumulation of majority carriers of the field effect transistor is suppressed at the interface of heterojunction in the buffering compound semiconductor layer and the interface between the substrate and the buffering compound semiconductor layer in the device isolation region so that the discontinuity of energy forbidden bands of the semiconductors caused at the interfaces does not form a potential barrier upon conduction of the carriers into the substrate, whereby the sidegating effect from the resistor element, etc. placed adjacently to the field effect transistor can be decreased drastically.Type: ApplicationFiled: January 24, 2008Publication date: January 29, 2009Inventors: Takeshi Kikawa, Shinichiro Takatani, Tomihisa Yukimoto, Yohei Otoki, Hiroyuki Kamogawa, Tomoyoshi Mishima
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Publication number: 20080298415Abstract: A semiconductor device having high reliability, a long lifetime and superior light emitting characteristics by applying a novel material to a p-type cladding layer is provided. A semiconductor device includes a p-type semiconductor layer on an InP substrate, in which the p-type semiconductor layer has a laminate structure formed by alternately laminating a first semiconductor layer mainly including Bex1Mgx2Znx3Te (0<x1<1, 0<x2<1, 0<x3<1, x1+x2+x3=1) and a second semiconductor layer mainly including Bex4Mgx5Znx6Te (0<x4<1, 0<x5<1, 0<x6<1, x4+x5+x6=1).Type: ApplicationFiled: June 3, 2008Publication date: December 4, 2008Applicants: SONY CORPORATION, HITACHI, LTD, SOPHIA SCHOOL CORPORATIONInventors: Katsumi Kishino, Ichiro Nomura, Koshi Tamamura, Kunihiko Tasai, Tsunenori Asatsuma, Hitoshi Nakamura, Sumiko Fujisaki, Takeshi Kikawa
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Publication number: 20080049803Abstract: The present invention provides a Be-based group II-VI semiconductor laser using an InP substrate and having a stacked structure capable of continuous oscillation at a room temperature. A basic structure of a semiconductor laser is constituted by using a Be-containing lattice-matched II-VI semiconductor above an InP substrate. An active laser, an optical guide layer, and a cladding layer are constituted in a double hetero structure having a type I band line-up in order to enhance the injection efficiency of carriers to the active layer. Also, the active layer, the optical guide layer, and the cladding layer, which are capable of enhancing the optical confinement to the active layer, are constituted, and the cladding layer is constituted with bulk crystals.Type: ApplicationFiled: July 30, 2007Publication date: February 28, 2008Inventors: Katsumi Kishino, Ichiro Nomura, Tsunenori Asatsuma, Hitoshi Nakamura, Tsukuru Ohtoshi, Takeshi Kikawa, Sumiko Fujisaki, Shigehisa Tanaka
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Publication number: 20070126119Abstract: An object of the present invention is to provide a semiconductor production technology capable of preventing the peeling of the electrode which occurs in die bonding or wire bonding. There is provided a semiconductor element having an electrode in a surface or in a rear face of a semiconductor substrate, the semiconductor element having a structure in which an amorphous silicon layer 106 is inserted in between an electrode 107 and a semiconductor substrate 101, wherein hydrogen is not added to the amorphous silicon layer 106. Furthermore, an amorphous silicon layer 104 is inserted also in the interface between an electrode 105 and an insulating layer 103, and in the interface between the insulating layer and the semiconductor substrate.Type: ApplicationFiled: June 19, 2006Publication date: June 7, 2007Inventors: Ryu Washino, Takeshi Kikawa, Yasushi Sakuma, Kaoru Okamoto
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Patent number: 6990133Abstract: Laser diodes containing aluminum at high concentration in an active layer have been usually suffered from remarkable facet deterioration along with laser driving operation and it has been difficult for the laser diodes to attain high reliability. An aluminum oxide film lacking in oxygen is formed adjacent to the semiconductor on an optical resonator facet, by which facet deterioration can be minimized and, accordingly, the laser diode can be operated with no facet deterioration at high temperature for long time and a laser diode of high reliability can be manufactured at a reduced cost.Type: GrantFiled: February 6, 2004Date of Patent: January 24, 2006Assignees: Hitachi, Ltd., Opnext Japan, Inc.Inventors: Takeshi Kikawa, Kouji Nakahara, Etsuko Nomoto
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Publication number: 20050287813Abstract: An apparatus for decreasing plasma-induced damage caused by exposure to plasma is provided in an apparatus for manufacturing semiconductor devices using plasma. An apparatus is used for irradiating the semiconductor surface with as least one of X-rays and UV-rays in a vacuum or in an inert atmosphere after plasma processing.Type: ApplicationFiled: August 31, 2004Publication date: December 29, 2005Inventors: Takeshi Kikawa, Hiroyuki Uchiyama, Takafumi Taniguchi
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Publication number: 20050127383Abstract: Laser diodes containing aluminum at high concentration in an active layer have been usually suffered from remarkable facet deterioration along with laser driving operation and it has been difficult for the laser diodes to attain high reliability. An aluminum oxide film lacking in oxygen is formed adjacent to the semiconductor on an optical resonator facet, by which facet deterioration can be minimized and, accordingly, the laser diode can be operated with no facet deterioration at high temperature for long time and a laser diode of high reliability can be manufactured at a reduced cost.Type: ApplicationFiled: February 6, 2004Publication date: June 16, 2005Inventors: Takeshi Kikawa, Kouji Nakahara, Etsuko Nomoto
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Patent number: 6576503Abstract: A laser diode having an optical cavity which is formed on top of a semiconductor substrate and has semiconductor crystals and an oxide layer that is substantially free from arsenic oxide. The oxide layer may be formed by using the matrix of the optical cavity as a matrix or a layer formed by the hydrogenation or oxygenation of the matrix of the cavity on at least one side of the optical cavity. The laser diode has a long operational life and high reliability without facet degradation.Type: GrantFiled: July 12, 2001Date of Patent: June 10, 2003Assignee: Hitachi, Ltd.Inventors: Takeshi Kikawa, Shigeo Goto
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Patent number: 6455876Abstract: A semiconductor radiative device comprises a layered film comprised of a low-refraction first dielectric film and a high-refraction second dielectric film having a refraction index greater than that of the first dielectric film, and formed on at least one of facets of an optical cavity. The high-refraction second dielectric film is an amorphous dielectric film of nitrogen-doped hydrogenated silicon. The semiconductor radiative device is capable of stably operating in a high-output mode for a long period of time.Type: GrantFiled: August 20, 2001Date of Patent: September 24, 2002Assignee: Hitachi, Ltd.Inventors: Takeshi Kikawa, Shigeo Goto
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Publication number: 20020113243Abstract: A semiconductor radiative device comprises a layered film comprised of a low-refraction first dielectric film and a high-refraction second dielectric film having a refraction index greater than that of the first dielectric film, and formed on at least one of facets of an optical cavity. The high-refraction second dielectric film is an amorphous dielectric film of nitrogen-doped hydrogenated silicon. The semiconductor radiative device is capable of stably operating in a high-output mode for a long period of time.Type: ApplicationFiled: August 20, 2001Publication date: August 22, 2002Inventors: Takeshi Kikawa, Shigeo Goto
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Publication number: 20020115303Abstract: A semiconductor device has a strongly bonding structure for improving bond strength between the semiconductor and the insulating layer even if the insulating layer is formed by a traditional method which causes slight damage to the semiconductor. The strongly bonding structure includes an oxide layer 12 (containing a constituent element of the semiconductor), an oxide bonding layer, a bond-creating layer (which may disappear from the finished product), and an insulating layer, which are sequentially formed one over the other. The oxide layer may be either one which occurs naturally or one which is formed artificially. The oxide bonding layer is formed by reaction between oxygen in the oxide layer and a constituent element in the bond-creating layer. The bond-creating layer contains an element that oxidizes and an element that reacts with a constituent element of the insulating layer.Type: ApplicationFiled: December 13, 2001Publication date: August 22, 2002Applicant: Hitachi, Ltd.Inventors: Hiroshi Ohta, Shinichiro Takatani, Toshimi Yokoyama, Takeshi Kikawa
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Publication number: 20020042157Abstract: A laser diode having an optical cavity which is formed on top of a semiconductor substrate and has semiconductor crystals and an oxide layer that is substantially free from arsenic oxide. The oxide layer may be formed by using the matrix of the optical cavity as a matrix or a layer formed by the hydrogenation or oxygenation of the matrix of the cavity on at least one side of the optical cavity. The laser diode has a long operational life and high reliability without facet degradation.Type: ApplicationFiled: July 12, 2001Publication date: April 11, 2002Applicant: Hitachi, Ltd.Inventors: Takeshi Kikawa, Shigeo Goto
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Patent number: 5508554Abstract: Disclosed is a semiconductor device capable of suppressing the generation of dislocations due to the difference in lattice constant by insertion of one or more defect type compound layers in a semiconductor layered structure. The strain generated by the mismatch of the lattice is relaxed by a large amount of vacancies contained in the defect type compound layer, to suppress the generation and the propagation of dislocations, thus inexpensively fabricating a semiconductor device with less deterioration of the characteristics due to defects with good repeatability.Type: GrantFiled: August 23, 1994Date of Patent: April 16, 1996Assignee: Hitachi, Ltd.Inventors: Shinichiro Takatani, Takeshi Kikawa, Yoko Uchida
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Patent number: 5399230Abstract: A compound semiconductor is etched by a step of substituting a composite element of a compound semiconductor with other element, thereby forming a compound layer on the surface of the compound semiconductor and a step of removing the compound layer from the surface. Etching depth is controlled not by etching time, but by the number of runs (repetitions) of the etching step, and thus can be precisely controlled.Type: GrantFiled: June 7, 1993Date of Patent: March 21, 1995Assignee: Hitachi, Ltd.Inventors: Shinichiro Takatani, Takeshi Kikawa, Chushirou Kusano, Masatoshi Nakazawa