Patents by Inventor Takeshi Miyajima
Takeshi Miyajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11225217Abstract: An airbag apparatus includes an airbag housed deployably, and an instrument panel covering the airbag in a deploying direction and forming a design surface of a vehicle cabin. The instrument panel includes, on the design surface facing the vehicle cabin, a character line including continuous protrusions toward the deploying direction. The instrument panel includes, on a surface facing the airbag along the character line, a tear line that ruptures at the time of deployment of the airbag.Type: GrantFiled: February 27, 2020Date of Patent: January 18, 2022Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Kenji Kokubu, Masatoshi Otake, Takeshi Miyajima, Masayuki Tado
-
Publication number: 20200290550Abstract: An airbag apparatus includes an airbag housed deployably, and an instrument panel covering the airbag in a deploying direction and forming a design surface of a vehicle cabin. The instrument panel includes, on the design surface facing the vehicle cabin, a character line including continuous protrusions toward the deploying direction. The instrument panel includes, on a surface facing the airbag along the character line, a tear line that ruptures at the time of deployment of the airbag.Type: ApplicationFiled: February 27, 2020Publication date: September 17, 2020Inventors: Kenji KOKUBU, Masatoshi OTAKE, Takeshi MIYAJIMA, Masayuki TADO
-
Patent number: 9368575Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: GrantFiled: November 27, 2013Date of Patent: June 14, 2016Assignee: DENSO COPORATIONInventor: Takeshi Miyajima
-
Publication number: 20140077289Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: ApplicationFiled: November 27, 2013Publication date: March 20, 2014Applicant: DENSO CORPORATIONInventor: Takeshi MIYAJIMA
-
Patent number: 8659082Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: GrantFiled: February 19, 2013Date of Patent: February 25, 2014Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Patent number: 8421154Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: GrantFiled: November 30, 2011Date of Patent: April 16, 2013Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Publication number: 20120068298Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: ApplicationFiled: November 30, 2011Publication date: March 22, 2012Applicant: DENSO CORPORATIONInventor: Takeshi MIYAJIMA
-
Patent number: 8106453Abstract: A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing direction. The first and second columns are alternately arranged in an alternating direction. Each first column provides a drift layer. The first and second columns have a boundary therebetween, from which a depletion layer expands in case of an off-state. At least one of the first columns and the second columns have an impurity dose, which is inhomogeneous by location with respect to the alternating direction.Type: GrantFiled: January 30, 2007Date of Patent: January 31, 2012Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Patent number: 8018028Abstract: A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction structure. The outer peripheral region is disposed at an outer periphery of the cell region. The Zener diode is disposed on the insulator film for electrically connecting the field plate with the outermost peripheral ring. The Zener diode has a first conductivity type region and a second conductivity type region that are alternately arranged in a direction from the cell region to the outer peripheral region.Type: GrantFiled: December 29, 2010Date of Patent: September 13, 2011Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Patent number: 8008768Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a casing, a board and a semiconductor chip. The chip includes: an element part; a heat sink bonded to the element part; an insulting layer located on the heat sink so that the heat sink is located between the element part and the insulating layer; and a side wall insulating layer covering all of end faces of the heat sink. The semiconductor chip is located between the casing and the board, so that the insulating layer is directed to the casing to enable heat radiation from the heat sink toward the casing via the insulating layer.Type: GrantFiled: February 10, 2011Date of Patent: August 30, 2011Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Publication number: 20110133328Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a casing, a board and a semiconductor chip. The chip includes: an element part; a heat sink bonded to the element part; an insulting layer located on the heat sink so that the heat sink is located between the element part and the insulating layer; and a side wall insulating layer covering all of end faces of the heat sink. The semiconductor chip is located between the casing and the board, so that the insulating layer is directed to the casing to enable heat radiation from the heat sink toward the casing via the insulating layer.Type: ApplicationFiled: February 10, 2011Publication date: June 9, 2011Applicant: DENSO CORPORATIONInventor: Takeshi MIYAJIMA
-
Publication number: 20110095303Abstract: A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction structure. The outer peripheral region is disposed at an outer periphery of the cell region. The Zener diode is disposed on the insulator film for electrically connecting the field plate with the outermost peripheral ring. The Zener diode has a first conductivity type region and a second conductivity type region that are alternately arranged in a direction from the cell region to the outer peripheral region.Type: ApplicationFiled: December 29, 2010Publication date: April 28, 2011Applicant: DENSO CORPORATIONInventor: Takeshi MIYAJIMA
-
Patent number: 7932132Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a casing, a board and a semiconductor chip. The chip includes: an element part; a heat sink bonded to the element part; an insulating layer located on the heat sink so that the heat sink is located between the element part and the insulating layer; and a side wall insulating layer covering all of end faces of the heat sink. The semiconductor chip is located between the casing and the board, so that the insulating layer is directed to the casing to enable heat radiation from the heat sink toward the casing via the insulating layer.Type: GrantFiled: February 24, 2009Date of Patent: April 26, 2011Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Patent number: 7910411Abstract: A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction structure. The outer peripheral region is disposed at an outer periphery of the cell region. The Zener diode is disposed on the insulator film for electrically connecting the field plate with the outermost peripheral ring. The Zener diode has a first conductivity type region and a second conductivity type region that are alternately arranged in a direction from the cell region to the outer peripheral region.Type: GrantFiled: January 3, 2008Date of Patent: March 22, 2011Assignee: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Patent number: 7858475Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.Type: GrantFiled: November 9, 2009Date of Patent: December 28, 2010Assignee: DENSO CORPORATIONInventors: Hitoshi Yamaguchi, Takeshi Miyajima, Nozomu Akagi
-
Publication number: 20100112765Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.Type: ApplicationFiled: November 9, 2009Publication date: May 6, 2010Applicant: DENSO CORPORATIONInventors: Hitoshi Yamaguchi, Takeshi Miyajima, Nozomu Akagi
-
Patent number: 7635622Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.Type: GrantFiled: August 9, 2007Date of Patent: December 22, 2009Assignee: DENSO CORPORATIONInventors: Hitoshi Yamaguchi, Takeshi Miyajima
-
Publication number: 20090227070Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a casing, a board and a semiconductor chip. The chip includes: an element part; a heat sink bonded to the element part; an insulting layer located on the heat sink so that the heat sink is located between the element part and the insulating layer; and a side wall insulating layer covering all of end faces of the heat sink. The semiconductor chip is located between the casing and the board, so that the insulating layer is directed to the casing to enable heat radiation from the heat sink toward the casing via the insulating layer.Type: ApplicationFiled: February 24, 2009Publication date: September 10, 2009Applicant: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Publication number: 20080173935Abstract: A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction structure. The outer peripheral region is disposed at an outer periphery of the cell region. The Zener diode is disposed on the insulator film for electrically connecting the field plate with the outermost peripheral ring. The Zener diode has a first conductivity type region and a second conductivity type region that are alternately arranged in a direction from the cell region to the outer peripheral region.Type: ApplicationFiled: January 3, 2008Publication date: July 24, 2008Applicant: DENSO CORPORATIONInventor: Takeshi Miyajima
-
Publication number: 20080038850Abstract: A manufacturing method of a semiconductor device includes: forming multiple trenches on a semiconductor substrate; forming a second conductive type semiconductor film in each trench to provide a first column with the substrate between two trenches and a second column with the second conductive type semiconductor film in the trench, the first and second columns alternately repeated along with a predetermined direction; thinning a second side of the substrate; and increasing an impurity concentration in a thinned second side so that a first conductive type layer is provided. The impurity concentration of the first conductive type layer is higher than the first column. The first column provides a drift layer so that a vertical type first-conductive-type channel transistor is formed.Type: ApplicationFiled: August 9, 2007Publication date: February 14, 2008Applicant: DENSO CORPORATIONInventors: Hitoshi Yamaguchi, Takeshi Miyajima