Patents by Inventor Takeshi Mizusawa

Takeshi Mizusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor IC device including ESD protection circuit
    Patent number: 5784235
    Abstract: A surge protection circuit including a first MOSFET and a second MOSFET connected in series. The drain of the first MOSFET is connected to the input terminal and the source of the second MOSFET is grounded. The gate of the second MOSFET is grounded, whereas the gate of the first MOSFET is connected to a high potential power supply terminal. This makes it possible to equalize the voltages applied to the two MOSFETs constituting the surge protection circuit, and weakens the intensity of the internal electric field of respective MOSFETs, thereby prolonging the lifetime of the surge protection circuit. The surge protection circuit is particularly effective in a SOI LSI.
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: July 21, 1998
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yusuke Otomo, Takeshi Mizusawa, Tetsuro Komatsu