Abstract: An amplifier circuit includes a main amplifier and an auxiliary circuit that improves a slew rate of the main amplifier. The main amplifier is composed of a one-stage CMOS amplifier, amplifies a voltage difference between two input signals, and outputs, from output terminals, an output signal corresponding to the voltage difference of the input signals. The auxiliary circuit controls an auxiliary bias current flowing through the output terminals according to the voltage difference of the input signals, and interrupts the auxiliary bias current at a predetermined timing before completion of settling. Such a scheme enables improvement of a slew rate by the auxiliary circuit and high-speed operation as well as reduction of error due to mismatch between the main amplifier and the auxiliary circuit, thereby yielding high-accuracy output signal output therefrom.

Abstract: In a power supply apparatus, power is transmitted from its input terminal to its output terminal. The transmitted power is controlled so that an output voltage detected in a predetermined ratio can be equal to a reference voltage. A reduction signal is outputted when the output voltage decreases below a threshold. A presence or absence of an abnormality in a capacitance connected to the output terminal or a load current in a load connected to the output terminal is determined, when the output voltage is equal to the target voltage, by changing at least one of the detection ratio and the reference voltage so that the output voltage can transition from a target voltage higher than the threshold toward a middle voltage lower than the threshold only during a predetermined time period.

Abstract: In a power supply apparatus, power is transmitted from its input terminal to its output terminal. The transmitted power is controlled so that an output voltage detected in a predetermined ratio can be equal to a reference voltage. A reduction signal is outputted when the output voltage decreases below a threshold. A presence or absence of an abnormality in a capacitance connected to the output terminal or a load current in a load connected to the output terminal is determined, when the output voltage is equal to the target voltage, by changing at least one of the detection ratio and the reference voltage so that the output voltage can transition from a target voltage higher than the threshold toward a middle voltage lower than the threshold only during a predetermined time period.