Patents by Inventor Takeshi Nagahori
Takeshi Nagahori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7952427Abstract: A signal amplifier circuit includes peak value holding circuit 11 receiving positive-phase input signal, peak value holding circuit 12 receiving negative-phase input signal, adder 13 adding the positive-phase input signal and output signal of peak value holding circuit 12, adder 14 adding the negative-phase input signal and output signal of the peak value holding circuit 11, non-inverting amplifier 15 amplifying output signal of adder 13, non-inverting amplifier 16 amplifying output signal of adder 14, peak value holding circuit 21 receiving positive-phase output signal of non-inverting amplifier 15, peak value holding circuit 22 receiving negative-phase output signal of non-inverting amplifier 16, adder 23 adding the positive-phase output signal and output signal of peak value holding circuit 22, adder 24 adding the negative-phase output signal and output signal of peak value holding circuit 21, and differential amplifier 29 amplifying difference between output signals of adders 23 and 24.Type: GrantFiled: March 20, 2007Date of Patent: May 31, 2011Assignee: Renesas Electronics CorporationInventor: Takeshi Nagahori
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Publication number: 20070226771Abstract: A signal amplifier circuit includes peak value holding circuit 11 receiving positive-phase input signal, peak value holding circuit 12 receiving negative-phase input signal, adder 13 adding the positive-phase input signal and output signal of peak value holding circuit 12, adder 14 adding the negative-phase input signal and output signal of the peak value holding circuit 11, non-inverting amplifier 15 amplifying output signal of adder 13, non-inverting amplifier 16 amplifying output signal of adder 14, peak value holding circuit 21 receiving positive-phase output signal of non-inverting amplifier 15, peak value holding circuit 22 receiving negative-phase output signal of non-inverting amplifier 16, adder 23 adding the positive-phase output signal and output signal of peak value holding circuit 22, adder 24 adding the negative-phase output signal and output signal of peak value holding circuit 21, and differential amplifier 29 amplifying difference between output signals of adders 23 and 24.Type: ApplicationFiled: March 20, 2007Publication date: September 27, 2007Applicant: NEC ELECTRONICS CORPORATIONInventor: Takeshi Nagahori
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Patent number: 7190194Abstract: In an active hybrid transformer circuit connected to both transmit and receive sides, a current driver is connected to a transmission path circuit through a common connection point of a load resistor and a replica resistor while a replica driver is connected to the replica resistor of which another connection point is directly connected to the receive side. The replica driver may be formed by a DAC of a current output type. A current ratio of the replica driver and the current driver is selected at a predetermined value so as to prevent a transmit signal from leaking into the receive side.Type: GrantFiled: February 13, 2004Date of Patent: March 13, 2007Assignees: NEC Electronics Corporation, NEC Electronics America, Inc.Inventors: Takeshi Nagahori, Mitsutoshi Sugawara
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Publication number: 20050179473Abstract: In an active hybrid transformer circuit connected to both transmit and receive sides, a current driver is connected to a transmission path circuit through a common connection point of a load resistor and a replica resistor while a replica driver is connected to the replica resistor of which another connection point is directly connected to the receive side. The replica driver may be formed by a DAC of a current output type. A current ratio of the replica driver and the current driver is selected at a predetermined value so as to prevent a transmit signal from leaking into the receive side.Type: ApplicationFiled: February 13, 2004Publication date: August 18, 2005Inventors: Takeshi Nagahori, Mitsutoshi Sugawara
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Patent number: 6903580Abstract: An optical transmitting circuit is provided with a switching circuit including a first current path and a second current path, supplying constant current from an anode electrode to a cathode electrode of an emitting device through M1 and M4 in a first current path in response to a emission drive signal, supplying the constant current from the cathode electrode to the anode electrode through M2 and M3 in a second current path in response to a non-emission drive signal, and supplying bias for the emitting device from a constant current source. By this means, in the case where the emitting device is in an emission state, the sum of the bias current and the constant current via the first current path passes through the emitting device. On the other hand, in the case where the emitting device is in a non-emission state, the difference between the constant current via the second current path and the bias current passes through the emitting device.Type: GrantFiled: July 18, 2001Date of Patent: June 7, 2005Assignee: NEC CorporationInventor: Takeshi Nagahori
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Patent number: 6538790Abstract: An optical receiver array includes a plurality of light-receiving elements, a plurality of amplifiers, and a plurality of low-pass filters. The light-receiving elements convert optical signals of a plurality of channels into electrical signals, respectively. The amplifiers amplify the electrical signals output from the light-receiving elements and output the electrical signals. Each amplifier has positive and negative power supply terminals to which power is supplied. Each low-pass filter is connected between the positive power supply terminal of a corresponding amplifier and a first external power supply terminal or between the negative power supply terminal of a corresponding amplifier and a second external power supply terminal. Each light-receiving element is connected between the positive power supply terminal and an input terminal of a corresponding amplifier or between the input terminal and the negative power supply terminal of a corresponding amplifier.Type: GrantFiled: June 22, 1999Date of Patent: March 25, 2003Assignee: NEC CorporationInventors: Ichiro Hatakeyama, Takeshi Nagahori, Kazunori Miyoshi
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Patent number: 6525858Abstract: A subscriber-line terminal apparatus comprising an access control circuit for time-division multiple access to a plurality of subscriber-line terminating sets, a multi-channel array optical transmitter, and a multi-channel optical receiver, the receiver comprising a differential input amplifier, a first photoelectric converter element whose cathode is connected to a reverse-bias power supply and whose anode is connected to one input terminal of the differential input amplifier, and a second photoelectric converter element whose anode is connected to a reverse-bias power supply and whose cathode is connected to the other input terminal of the differential input amplifier.Type: GrantFiled: June 4, 1998Date of Patent: February 25, 2003Assignee: NEC CorporationInventor: Takeshi Nagahori
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Patent number: 6466347Abstract: Disclosed is a binary optical transmission system for transmitting and receiving a target transmit data to be transmitted as a binary optical transmit data composed of luminous part and non-luminous part, wherein the target transmit data is transmitted and received by a coding to use a transmission code that the ratio of time of luminous part to time of non-luminous part in a time section longer than one cycle of a transmission clock used to transmit the target transmit data is less than 1.Type: GrantFiled: February 18, 1999Date of Patent: October 15, 2002Assignee: NEC CorporationInventor: Takeshi Nagahori
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Publication number: 20020011879Abstract: An optical transmitting circuit is provided with a switching circuit including a first current path and a second current path, supplying constant current from an anode electrode to a cathode electrode of an emitting device through M1 and M4 in a first current path in response to a emission drive signal, supplying the constant current from the cathode electrode to the anode electrode through M2 and M3 in a second current path in response to a non-emission drive signal, and supplying bias for the emitting device from a constant current source. By this means, in the case where the emitting device is in an emission state, the sum of the bias current and the constant current via the first current path passes through the emitting device. On the other hand, in the case where the emitting device is in a non-emission state, the difference between the constant current via the second current path and the bias current passes through the emitting device.Type: ApplicationFiled: July 18, 2001Publication date: January 31, 2002Inventor: Takeshi Nagahori
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Patent number: 6275541Abstract: A digital receiver circuit is easily integrated into a single chip. A differential output amplifier circuit is used for performing a binarizing decision by a quantizer for a differential output. A peak detection circuit, an average value detection circuit, an operational amplifier and a transistor are provided for controlling an input impedance and an offset of the differential output amplifier circuit depending upon a differential output. Thus, a capacitor for alternating current coupling as required conventionally, becomes unnecessary to facilitate integration into a single chip with minimum number of parts by full DC coupling.Type: GrantFiled: June 11, 1998Date of Patent: August 14, 2001Assignee: NEC CorporationInventors: Takeshi Nagahori, Shunichi Kanemitsu
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Patent number: 6181454Abstract: In an optical receiver, a photodiode converts an optical digital input signal to an electrical signal which is fed into a differential amplifier to produce a pair of true and complementary output signals. The true output signal is received by a peak detector and the output of this peak detector is summed in a first adder with the complementary output of the differential amplifier. The true output of the amplifier is summed in a second adder with a predetermined constant voltage. Difference between the output signals of the first and second adders is detected and compared with a decision threshold to produce an output signal at one of two logical levels depending on whether the difference is higher or lower than the decision threshold. Preferably, a second peak detector having a substantially similar operating characteristic to that of the first peak detector is connected between the source of the predetermined constant voltage and the second adder.Type: GrantFiled: April 23, 1998Date of Patent: January 30, 2001Assignee: NEC CorporationInventors: Takeshi Nagahori, Ichiro Hatakeyama, Kazunori Miyoshi
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Patent number: 6081362Abstract: An optical receiver can operate in response to an input optical signal to produce an output electrical signal. The optical receiver comprises a photo diode (340) for transducing the input optical signal into an electrical signal, a plurality of limit amplifier circuits (310-1, 310-2, . . . , and 310-n) which are connected in series which are connected in series to one another and which have offset compensation functions determined by controllable offset compensation time constants, respectively. The plurality of limit amplifier circuits amplify the electrical signal to produce an amplified and controlled electrical signal in dependency upon the offset compensation time constants controlled. The optical receiver further comprises adjusting circuits (320-1, 320-2, . . .Type: GrantFiled: October 17, 1997Date of Patent: June 27, 2000Assignee: NEC CorporationInventors: Ichiro Hatakeyama, Takeshi Nagahori
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Patent number: 6025945Abstract: An optical transmitter/receiver transmits and receives optical signals between terminal devices of a network which are connected by a twisted pair cable with a feeder line. The optical transmitter/receiver has an electric connector for connection to the twisted pair cable, a peak holding circuit for detecting whether there is an optical signal in an optical fiber based on an output signal from an optical receiver, and a biasing circuit for applying a bias voltage to the twisted pair cable. The biasing circuit applies a bias voltage to a twisted pair of the twisted pair cable if there is an optical signal in the optical fiber, and stops the application of the bias voltage to the twisted pair if there is no optical signal in the optical fiber. The terminal devices are capable of detecting insertion or removal of the twisted pair cable or the optical fiber.Type: GrantFiled: July 16, 1997Date of Patent: February 15, 2000Assignee: NEC CorporationInventors: Takayuki Nyu, Shuntaro Yamazaki, Takeshi Nagahori
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Patent number: 6018407Abstract: An optical receiving circuit comprising a plurality of amplifying circuits successively connected in a multiple stage form, each of the plurality of amplifying circuits having an offset compensating function. The optical receiving circuit includes offset compensating circuits respectively arranged in the plurality of amplifying circuits. Time constants of the offset compensating circuits are set in such a manner that the time constant of an offset compensating circuit arranged at one stage is smaller than that of an offset compensating circuit arranged at the previous stage.Type: GrantFiled: May 20, 1997Date of Patent: January 25, 2000Assignee: NEC CorporationInventors: Ichiro Hatakeyama, Takeshi Nagahori
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Patent number: 5896213Abstract: Disclosed is an optical fiber network system which has optical transmitter-receivers disposed in optical network units(ONUs) of number N.Type: GrantFiled: March 15, 1996Date of Patent: April 20, 1999Assignee: NEC CorporationInventors: Takeshi Nagahori, Shuntaro Yamazaki
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Patent number: 5872644Abstract: A fiber-optic access system for subscriber optical communication adopting star type topology in an optical fiber network includes a central office, a plurality of optical network units, an optical interface, and a signal recognition/reproduction and clock extraction IC. The optical interface is provided in the central office and includes an array optical transmission module as a package unit accommodating a plurality of light sources and a plurality of output fiber terminals, and an array optical reception module as a package unit accommodating a plurality of optical sensors and a plurality of input fiber terminals. The signal recognition/reproduction and clock extraction IC is provided to each channel of the array optical reception module. The access system provided is of a scale comparable to that of a central office side optical interface of PDS and wide band characteristics comparable to those of a single star type system.Type: GrantFiled: November 15, 1997Date of Patent: February 16, 1999Assignee: NEC CorporationInventors: Shuntaro Yamazaki, Takeshi Nagahori
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Patent number: 5838731Abstract: A burst-mode digital receiver which minimizes any reduction in the minimum input level as compared with a continuous-signal digital receiver includes a unipolar code-to-bipolar code converter for converging unipolar code pulses of an inputted burst signal into bipolar code pulses, an identifying circuit for identifying logic levels of "1" and "0" with an identifying level at a center of a pulse duration of bipolar code pulses outputted from the unipolar code-to-bipolar code converter, and a burst on/off detecting circuit for continuously outputting a signal until the inputted burst signal is finished when a pulse amplitude of the inputted burst signal exceeds a constant value. The burst-mode digital receiver produces an output signal when an AND gate connected to the output terminal of the identifying circuit is turned on at the time the output signal from the burst on/off detecting circuit is turned on.Type: GrantFiled: November 30, 1995Date of Patent: November 17, 1998Assignee: NEC CorporationInventor: Takeshi Nagahori
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Patent number: 5798664Abstract: In an optical receiver, an offset cancelling amplifier comprises a limiting amplifier for amplifying an input signal while preventing amplified amplitude from exceeding a predetermined level to provide an output signal, an offset detector for detecting an offset in the output signal to produce a detection signal representative of the offset amount detected, and an offset controller coupled in the input circuit of the limiting amplifier and the offset detector for controlling an input voltage of the limiting amplifier in response to the detection signal to reduce the offset in the output signal. In order to widen the dynamic range and lower the low-frequency cutoff of the offset cancelling amplifier, the offset detector comprises a Miller integrator.Type: GrantFiled: April 5, 1996Date of Patent: August 25, 1998Assignee: NEC CorporationInventors: Takeshi Nagahori, Ichiro Hatakeyama, Soichiro Araki, Kazunori Miyoshi
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Patent number: 5793256Abstract: In a preamplifier for amplifying an input signal supplied to an input terminal to supply an amplified output signal and a reference output signal to an output terminal and a reference output terminal, respectively, a reference level circuit produces a reference level. An amplifier is connected to the reference level circuit and has a predetermined structure. The amplifier amplifies the input signal into the amplified output signal with reference to the reference level to supply the amplified output signal to the output terminal. A dummy circuit is connected to the reference level circuit and has a structure which is identical with the predetermined structure. The dummy circuit responds to the reference level to produce the reference output signal related to the amplified output signal.Type: GrantFiled: April 5, 1996Date of Patent: August 11, 1998Assignee: NEC CorporationInventors: Takeshi Nagahori, Ichiro Hatakeyama, Soichiro Araki, Kazunori Miyoshi
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Patent number: 5539779Abstract: An automatic offset control circuit comprises a differential output preamplifier having an offset adjustment function, further comprising an average detector, a peak detector, and a differential input amplifier. The average detector generates a reference voltage representing an average value of a positive output and a negative output of the preamplifier. The peak detector outputs a peak voltage representing a peak of the negative output of the preamplifier. The differential input amplifier compares the peak voltage with the reference voltage to output an offset adjustment signal to the preamplifier. The offset adjustment signal is obtained based on a difference between the reference voltage and the peak voltage. A bottom detector may be used instead of the peak detector, provided a bottom value is detected using the positive output of the preamplifier.Type: GrantFiled: April 18, 1994Date of Patent: July 23, 1996Assignee: NEC CorporationInventor: Takeshi Nagahori