Patents by Inventor Takeshi Nagai

Takeshi Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070223586
    Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Takeshi NAGAI, Yoshihiro Kikuchi, Tadaaki Masuda
  • Publication number: 20070223449
    Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Takeshi NAGAI, Yoshihiro Kikuchi, Tadaaki Masuda
  • Publication number: 20070223583
    Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Takeshi Nagai, Yoshihiro Kikuchi, Tadaaki Masuda
  • Publication number: 20070226590
    Abstract: A synchronous semiconductor memory which performs a pipeline operation includes an error correction circuit, an output circuit, and first and second write circuits. The first write circuit is configured to overwrite at least a portion of externally input write data on data read out from a memory cell and corrected by the error correction circuit, and write the overwritten data in the memory cell. The output circuit is configured to output the overwritten data outside a chip. The second write circuit is configured to reoverwrite at least a portion of write data which is externally input at a different time on the overwritten data, encode the reoverwritten data, and write the encoded data in the memory cell.
    Type: Application
    Filed: June 16, 2006
    Publication date: September 27, 2007
    Inventor: Takeshi Nagai
  • Publication number: 20070223503
    Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Takeshi NAGAI, Yoshihiro Kikuchi, Tadaaki Masuda
  • Publication number: 20070223584
    Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
    Type: Application
    Filed: May 30, 2007
    Publication date: September 27, 2007
    Inventors: Takeshi NAGAI, Yoshihiro Kikuchi, Tadaaki Masuda
  • Patent number: 7269170
    Abstract: In an information transmission method, error robustness is provided for the bit stream itself so that decoding processing can be properly performed even in the event of an error in important information such as header information. A bit stream reconstruction circuit (107) in an encoding apparatus adds sync signals to the heads of encoded data streams, which are encoded by an encoder (103), in certain bit stream units, and then inserts designation information in each bit stream by using a designation information insertion circuit (106). Each designation information indicates the addition of information for reconstructing important header information. By inserting the designation information in the bit stream obtained, reconstruction information can be added to the bit stream.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: September 11, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Chujoh, Takeshi Nagai
  • Publication number: 20070205928
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 6, 2007
    Inventors: Takeshi CHUJOH, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Patent number: 7266025
    Abstract: Fuse data is supplied to each of a plurality of function blocks through a transfer path using shift registers. When the reliability of fuse elements is low, there is a possibility that a part of the fuse data may have an error. Further, when the transfer path of the fuse data is long, there is a possibility that a value of the fuse data may be inverted due to an influence of noises. Thus, a decoder is arranged in the transfer path of the fuse data, and encoded data is stored in the fuse elements. By performing error detection/correction in the decoder, the high reliability is assured with respect to chip operations and the like.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: September 4, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Nagai, Ryo Haga
  • Publication number: 20070195575
    Abstract: Fuse data is supplied to each of a plurality of function blocks through a transfer path using shift registers. When the reliability of fuse elements is low, there is a possibility that a part of the fuse data may have an error. Further, when the transfer path of the fuse data is long, there is a possibility that a value of the fuse data may be inverted due to an influence of noises. Thus, a decoder is arranged in the transfer path of the fuse data, and encoded data is stored in the fuse elements. By performing error detection/correction in the decoder, the high reliability is assured with respect to chip operations and the like.
    Type: Application
    Filed: April 23, 2007
    Publication date: August 23, 2007
    Inventors: Takeshi Nagai, Ryo Haga
  • Publication number: 20070189054
    Abstract: Fuse data is supplied to each of a plurality of function blocks through a transfer path using shift registers. When the reliability of fuse elements is low, there is a possibility that a part of the fuse data may have an error. Further, when the transfer path of the fuse data is long, there is a possibility that a value of the fuse data may be inverted due to an influence of noises. Thus, a decoder is arranged in the transfer path of the fuse data, and encoded data is stored in the fuse elements. By performing error detection/correction in the decoder, the high reliability is assured with respect to chip operations and the like.
    Type: Application
    Filed: April 23, 2007
    Publication date: August 16, 2007
    Inventors: Takeshi Nagai, Ryo Haga
  • Publication number: 20070188359
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 15, 2007
    Publication date: August 16, 2007
    Inventors: Takeshi CHUJOH, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Publication number: 20070188360
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 15, 2007
    Publication date: August 16, 2007
    Inventors: Takeshi CHUJOH, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Publication number: 20070160150
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 12, 2007
    Publication date: July 12, 2007
    Inventors: Takeshi Chujoh, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Publication number: 20070160148
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 12, 2007
    Publication date: July 12, 2007
    Inventors: Takeshi Chujoh, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Publication number: 20070160141
    Abstract: A picture encoding method includes receiving an input video signal, encoding the video signal using a reference picture signal to generate a video code stream, encoding the reference picture signal to generate a reference picture code stream, and multiplexing the video code stream with the reference picture code stream to generate an output code stream.
    Type: Application
    Filed: March 15, 2007
    Publication date: July 12, 2007
    Inventors: Takeshi NAGAI, Takeshi CHUJOH, Shinichiro KOTO, Yoshihiro KIKUCHI, Wataru Asano
  • Publication number: 20070160149
    Abstract: A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
    Type: Application
    Filed: March 12, 2007
    Publication date: July 12, 2007
    Inventors: Takeshi Chujoh, Toshiaki Watanabe, Yoshihiro Kikuchi, Takeshi Nagai
  • Publication number: 20070153895
    Abstract: A picture encoding method includes receiving an input video signal, encoding the video signal using a reference picture signal to generate a video code stream, encoding the reference picture signal to generate a reference picture code stream, and multiplexing the video code stream with the reference picture code stream to generate an output code stream.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 5, 2007
    Inventors: Takeshi Nagai, Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi, Wataru Asano
  • Publication number: 20070153893
    Abstract: A picture encoding method includes receiving an input video signal, encoding the video signal using a reference picture signal to generate a video code stream, encoding the reference picture signal to generate a reference picture code stream, and multiplexing the video code stream with the reference picture code stream to generate an output code stream.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 5, 2007
    Inventors: Takeshi Nagai, Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi, Wataru Asano
  • Publication number: 20070153913
    Abstract: A picture encoding method includes receiving an input video signal, encoding the video signal using a reference picture signal to generate a video code stream, encoding the reference picture signal to generate a reference picture code stream, and multiplexing the video code stream with the reference picture code stream to generate an output code stream.
    Type: Application
    Filed: March 15, 2007
    Publication date: July 5, 2007
    Inventors: Takeshi Nagai, Takeshi Chujoh, Shinichiro Koto, Yoshihiro Kikuchi, Wataru Asano