Patents by Inventor Takeshi Ohba

Takeshi Ohba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070188225
    Abstract: The distortion compensating apparatus, which adaptively updates a distortion compensation coefficient for an amplifier based on a difference between input and output signals of the amplifier, comprises: a distortion amount detector which detects the amount of distortion of an output signal of the amplifier; a parameter holder which holds a parameter having been set therein; a parameter corrector which corrects the parameter in such a manner that the distortion amount detected by the detector is improved; a power monitor which monitors output power of the amplifier or a factor of variation in the power; and a controller which halts, if a monitoring result by the power monitor is smaller than a specified threshold value, the correction of the parameter. This arrangement makes it possible to accurately set the parameter relating to difference detection which is a factor of updating of distortion compensation coefficients of the distortion compensating apparatus.
    Type: Application
    Filed: May 19, 2006
    Publication date: August 16, 2007
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Publication number: 20070176806
    Abstract: It is an object of the present invention to provide a DC offset correction means capable of correctly performing DC offset correction even when transmitting a non-modulation signal in radio communication equipment for performing orthogonal modulation by a direct RF modulation method. The DC offset correction device comprises a fixed value setting unit for setting a value for outputting a non-modulation signal with a specific phase from a modulator, a non-modulation signal switch unit for switching between a main signal and the value set by the fixed value setting unit and a DC offset correction control unit for sequentially changing the specific phase of the non-modulation signal outputted from the modulator by sequentially changing the value set by the fixed value setting unit and operating a DC offset correction value to be added to an input signal by a DC offset correction unit, based on feedback signal data generated from the non-modulation signal whose phase is sequentially changed.
    Type: Application
    Filed: April 20, 2006
    Publication date: August 2, 2007
    Inventors: Takeshi Ohba, Yasuhito Funyu, Hideharu Shako
  • Publication number: 20070042726
    Abstract: A distortion compensating technique applied to a transmitter for transmitting a quadrature modulated signal in a wireless digital communication system is provided. A phase adjustment value is determined for a quadrature demodulated feedback signal based on comparison between the feedback signal and a reference signal to be transmitted from the transmitter. This phase adjustment value is compared with the previous phase adjustment value. If the comparison result between the current and previous phase adjustment values satisfies a prescribed condition, correction for quadrature modulation, such as DC offset correction, orthogonality correction, or IQ amplitude correction, is performed.
    Type: Application
    Filed: December 27, 2005
    Publication date: February 22, 2007
    Inventors: Takeshi Ohba, Yasuhito Funyu, Hideharu Shako
  • Publication number: 20070030920
    Abstract: An address frequency operation unit counts frequencies of occurrences of addresses output by an address conversion unit 14, and a CPU 16 rewrites an address conversion table in the address conversion unit 14 based on a comparison between the counted result and a threshold value. When the frequency of the address is lower than the threshold value, the frequency of occurrence of an output address is increased by increasing the number of input addresses corresponding to one output address. Also, distortion in an output signal which is fed back is detected and the address conversion table is rewritten so that the distortion is decreased.
    Type: Application
    Filed: November 8, 2005
    Publication date: February 8, 2007
    Inventors: Yasuhito Funyu, Takeshi Ohba, Hideharu Shako
  • Publication number: 20060215783
    Abstract: A step size parameter ? is adaptively varied when a distortion compensation coefficient is calculated in a distortion compensation apparatus, relation between transmission signal level and step size parameter ? is considered. The distortion compensation apparatus includes a memory storing distortion compensation coefficient in a designated write address, and outputting distortion compensation coefficient being stored in a designated readout address; a predistortion section performing distortion compensation processing onto a transmission signal, using the distortion compensation coefficient being output from memory; and a distortion compensation section calculating an update value of distortion compensation coefficient, based on error component existent between transmission signal before distortion compensation processing and transmission signal after being amplified by an amplifier.
    Type: Application
    Filed: July 26, 2005
    Publication date: September 28, 2006
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Publication number: 20060209983
    Abstract: Provided is a distortion compensation apparatus to prevent divergence of distortion compensation coefficients caused by an abnormal distortion compensation coefficient value. The distortion compensation apparatus includes a storage for storing a distortion compensation coefficient in a specified write address, and outputting a distortion compensation coefficient stored in a specified readout address; a predistortion portion for performing distortion compensation processing onto a transmission signal, using the distortion compensation coefficient being output from the storage; and a distortion compensator for calculating a distortion compensation coefficient based on the transmission signal before the distortion compensation processing and the transmission signal after being amplified by an amplifier.
    Type: Application
    Filed: June 30, 2005
    Publication date: September 21, 2006
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Publication number: 20060188038
    Abstract: A distortion compensation apparatus is provided to restrain an increased calculation time caused by a large amount of calculation required for obtaining a phase variation amount for compensation from the correlation.
    Type: Application
    Filed: June 8, 2005
    Publication date: August 24, 2006
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Publication number: 20060046764
    Abstract: A power correction value generating unit determines a power correction value for minimizing an error, from a reference output power value of a carrier multiplexed signal, generating due to peak power suppression under a carrier setting based on the carrier setting relating to either one or both of the number of carrier signals and frequency arrangement, and peak suppression setting. An output power error correcting unit corrects a signal gain before or after the carrier signals are multiplexed, using the power correction value obtained by the power correction value generating unit. In an apparatus performing peak suppression according to an input limitation power of the power amplifier, it is possible to always obtain a desirable transmission (output) power even when the number of carriers or carrier frequency arrangement varies.
    Type: Application
    Filed: December 21, 2004
    Publication date: March 2, 2006
    Inventors: Takeshi Ohba, Yasuhito Funyu, Hiroaki Abe, Tomohiro Nakamura
  • Publication number: 20060029155
    Abstract: To shorten the time required for writing of the distortion compensation coefficient and to reduce amount of data of the distortion compensation coefficient stored as the initial value of the distortion compensation apparatus. The distortion compensation apparatus for amplifying the transmitting signal after implementing the distortion compensation process comprises a coefficient memory for storing corresponding to each address the coefficient used for the distortion compensation process, an initial value memory for storing the initial value of the coefficient, and a controller for write control corresponding to n (n: natural number equal to 2 or larger) addresses of the coefficient read from the initial value memory corresponding to one address.
    Type: Application
    Filed: April 25, 2005
    Publication date: February 9, 2006
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Publication number: 20060023807
    Abstract: A distortion compensation apparatus shortens the time until start of the transmission. The distortion compensating apparatus for amplifying the transmitted signal after implementation of the distortion compensation process thereto comprises a coefficient memory operable to store coefficients used for the distortion compensation process, an initial value memory operable to store the initial values of the coefficients, and a controller which controls the coefficient memory to store, with limitation, only the coefficients corresponding to the first portion among those stored in the initial value memory for the initial write to the coefficient memory and to store thereafter the coefficients corresponding to the second portion.
    Type: Application
    Filed: April 18, 2005
    Publication date: February 2, 2006
    Inventors: Hideharu Shako, Yasuhito Funyu, Takeshi Ohba
  • Patent number: 6949976
    Abstract: A distortion compensating amplifier device is disclosed that maintains uniform delay amounts between a transmission input signal and a transmission output signal, even if there is a change in the device characteristics. The distortion compensating amplifier device of a digital predistortion type includes a second delay circuit that delays the transmission input signal; a distortion compensating circuit that performs predistortion compensation on the delayed signal, using a distortion compensating parameter; an amplifier that amplifies the signal subjected to the predistortion compensation; a first delay circuit that further delays the signal delayed by the second delay circuit; and a calculator that calculates the distortion compensating parameter to be used in the predistortion compensation, based on the difference between the signal output from the first delay circuit and the amplified signal.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Yasuhito Funyu, Takao Sasaki, Hiromi Miyamoto, Takeshi Ohba
  • Publication number: 20050104758
    Abstract: A distortion compensator updating and selecting a distortion compensation coefficient applied to a digital transmission signal so as to reduce the difference between the digital transmission signal and a digital feedback signal is disclosed. The distortion compensator includes a control part that controls the level of an input signal to an analog-to-digital conversion part outputting the digital feedback signal in accordance with the magnitude of the amplitude of the digital transmission signal.
    Type: Application
    Filed: May 20, 2004
    Publication date: May 19, 2005
    Inventors: Yasuhito Funyu, Hiroaki Abe, Takeshi Ohba, Tomohiro Nakamura
  • Publication number: 20050104658
    Abstract: A distortion compensating amplifier device is disclosed that maintains uniform delay amounts between a transmission input signal and a transmission output signal, even if there is a change in the device characteristics. The distortion compensating amplifier device of a digital predistortion type includes a second delay circuit that delays the transmission input signal; a distortion compensating circuit that performs predistortion compensation on the delayed signal, using a distortion compensating parameter; an amplifier that amplifies the signal subjected to the predistortion compensation; a first delay circuit that further delays the signal delayed by the second delay circuit; and a calculator that calculates the distortion compensating parameter to be used in the predistortion compensation, based on the difference between the signal output from the first delay circuit and the amplified signal.
    Type: Application
    Filed: December 23, 2004
    Publication date: May 19, 2005
    Inventors: Yasuhito Funyu, Takao Sasaki, Hiromi Miyamoto, Takeshi Ohba
  • Patent number: 6737770
    Abstract: A brushless motor for a blower fan unit has a circuit structure constituted by a drive control circuit and a fuse member. The drive control circuit supplying drive current comprises a first circuit section for eliminating surges of electric power and a second circuit section for controlling magnetic field generated by the stator. The first and second circuit sections are three-dimensionally arranged with a predetermined space therebetween. The fuse member electrically connects the first and second circuit sections. An end portion of the fuse member is welded with the first circuit section, and the other end portion of the fuse member is soldered with the second circuit section. The fuse member cuts an electrical connection between the first and second circuit sections when a temperature of solder becomes higher than a predetermined temperature.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: May 18, 2004
    Assignee: Calsonic Kansei Corporation
    Inventors: Hideki Sunaga, Takeshi Ohba, Hiromi Kawarai, Kazunori Yamada, Narihito Sano
  • Patent number: 6728523
    Abstract: A method of stabilizing frequency of an output signal of a data-relay apparatus provided in a radio communication system that includes a relay station and a radio terminal device, wherein the data-relay apparatus receives a signal as an input signal from the relay station, and transmits the signal as an output signal to the radio terminal device. The method includes the steps of demodulating the output signal to generate a demodulated signal by use of a first signal, detecting frequency deviation of the output signal from the demodulated signal, generating the first signal according to the detected frequency deviation of the output signal, and generating a second signal to mix with the input signal to generate the output signal according to the generation of the first signal and the second signal being carried out such that the detected frequency deviation of the output signal becomes substantially zero.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: April 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Takeshi Ohba, Atsushi Yamashita
  • Patent number: 6617719
    Abstract: A brushless motor includes a circuit protecting case, a holder disposed on the case, a motor shaft rotatably held by the holder, a stator disposed about the holder, a yoke fixed to the motor shaft to rotate therewith, permanent magnets held by the yoke, and a circuit substrate held in the circuit protecting case. The stator includes a plurality of coils which surround the motor shaft. The circuit substrate contains a drive circuit and a control section. The drive circuit includes a switching section which switches the current path directed to the coils of the stator. A partition wall, provided in the circuit protection case, partitions the interior of the case into a first chamber and a second chamber.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: September 9, 2003
    Assignee: Calsonic Kansei Corporation
    Inventors: Hideki Sunaga, Takeshi Ohba, Kazunori Yamada, Katsuhiro Machida, Hiromi Kawarai, Yoshinori Asayama
  • Patent number: 6545442
    Abstract: In apparatus and method for controlling a rotation speed of a brushless motor, the rotation speed of the rotor is lowered by a predetermined gradient for the rotation speed of the rotor to be reached to a present target value of the rotation speed of the rotor when the rotor of the motor is rotating at a previous target value of the rotor of the motor previously calculated and the present target value of the rotor of the motor is lower than the previous target value thereof at which the rotor of the motor is rotating. The predetermined gradient is, for example, 100% per unit time.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: April 8, 2003
    Assignee: Calsonic Kansei Corporation
    Inventors: Hideki Sunaga, Takeshi Ohba, Eiji Takahashi
  • Publication number: 20020093259
    Abstract: A brushless motor for a blower fan unit has a circuit structure constituted by a drive control circuit and a fuse member. The drive control circuit supplying drive current comprises a first circuit section for eliminating surges of electric power and a second circuit section for controlling magnetic field generated by the stator. The first and second circuit sections are three-dimensionally arranged with a predetermined space therebetween. The fuse member electrically connects the first and second circuit sections. An end portion of the fuse member is welded with the first circuit section, and the other end portion of the fuse member is soldered with the second circuit section. The fuse member cuts an electrical connection between the first and second circuit sections when a temperature of solder becomes higher than a predetermined temperature.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 18, 2002
    Applicant: CALSONIC KANSEI CORPORATION
    Inventors: Hideki Sunaga, Takeshi Ohba, Hiromi Kawarai, Kazunori Yamada, Narihito Sano
  • Patent number: D533821
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: December 19, 2006
    Assignee: Honda Motor Co., Ltd.
    Inventors: Teruyoshi Tamagawa, Takeshi Ohba
  • Patent number: D534849
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: January 9, 2007
    Assignee: Honda Motor Co., Ltd.
    Inventors: Teruyoshi Tamagawa, Takeshi Ohba