Abstract: According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.

Abstract: In an MRAM having main and sub-structures, selecting transistors are arranged so as to meet the arrangement order of main word lines, sub-word lines and the selecting transistors. The selecting transistor is driven to cause a snap back phenomenon to occur. As a result, data can be written to a memory cell using a substrate current, not a channel current. Moreover, a data may be written into a selected memory cell by discharge the charge which is charged in the main and sub word lines corresponding to the memory cell.

Abstract: A method of forming a magnetic memory, includes, forming a first magnetic film over a substrate, forming a second magnetic film on the first magnetic film, forming a conductive film on second magnetic film, and forming a resist pattern on the conductive film. Then, a first pattern is formed by etching the conductive film using the resist pattern as a mask and the resist pattern is removed. Then, a first magnetic substance layer is formed by etching the second magnetic film using the first pattern as a mask.

Abstract: A magnetic memory according to the present invention comprises: a single magnetic memory cell having at least first to third magnetic layers, a first tunnel insulating layer between the first and second magnetic layers and a second tunnel insulating layer between the second and third magnetic layers. The resistance between the first and third magnetic layers when magnetization of the first and second magnetic layers are in opposite directions is different from the resistance between the second and third magnetic layers when magnetization of the second and third magnetic layers are in opposite directions. Multiple data are therefore stored into the memory cell.

Abstract: A semiconductor memory device as claimed in the present invention has a reference cell, a first memory cell, a second memory cell located nearer the first memory cell than the reference cell and a data read circuit provided therein. The data read circuit identifies first data stored in the first memory cell based on a reference cell electrical state of the reference cell and a first electrical state of the first memory cell. Furthermore, the data read circuit identifies second data stored in the second memory cell based on the first electrical state of the first memory cell and a second electrical state of the second memory cell. The semiconductor memory device having such configuration is able to suppress influence of variation in electrical performance of memory cell and stably identify data stored in a memory cell.

Abstract: A magnetic memory according to the present invention comprises: a single magnetic memory cell having at least first to third magnetic layers, a first tunnel insulating layer between the first and second magnetic layers and a second tunnel insulating layer between the second and third magnetic layers. The resistance between the first and third magnetic layers when magnetization of the first and second magnetic layers are in opposite directions is different from the resistance between the second and third magnetic layers when magnetization of the second and third magnetic layers are in opposite directions. Multiple data are therefore stored into the memory cell.

Abstract: A magnetic memory of a present invention is formed as below. The magnetic memory has a TMR film formed on a first conductive film, and a second conductive film with a flat top surface, having the same plane shape as that of the TMR film, formed on the TMR laminated film. A first insulating film having a flat top surface and the same height as the surface of the second conductive film is formed so as to surround the TMR film and the second conductive film. A third conductive film connected electrically to the second conductive film is formed on the first insulating film.

Abstract: In an MRAM having main and sub-structures, selecting transistors are arranged so as to meet the arrangement order of main word lines, sub-word lines and the selecting transistors. The selecting transistor is driven to cause a snap back phenomenon to occur. As a result, data can be written to a memory cell using a substrate current, not a channel current. Moreover, a data may be written into a selected memory cell by discharge the charge which is charged in the main and sub word lines corresponding to the memory cell.

Abstract: A method of manufacturing a magnetic random access memory for excluding stress-induced defects in memory cells. The method is composed of forming a first magnetic film over a substrate, forming a tunnel insulating film on the first magnetic film such that the tunnel insulating film has a curvature, forming a second magnetic film on the tunnel insulating film, and etching the first magnetic film, the tunnel insulating film and the second magnetic film to form a memory cell. The etching is executed such that the curvature is excluded from the memory cell.

Abstract: A nonvolatile storage device and method of operation capable of preventing opens in a word line and/or bit line that may result from electromigration is disclosed. A nonvolatile storage device according to an embodiment may include a number of magnetic resistance elements provided at intersections of word lines and bit lines, a word line control circuit for selecting one word line and supplying a write current thereto in a write operation, and a bit line control circuit for selecting one bit line and supplying a write current thereto. A word line control circuit can provide a bidirectional write current to a word line.

Abstract: According to the semiconductor memory device of this invention, an XP type MRAM cell array and an STr type MRAM cell array are formed on a single chip. The XP type MRAM cell array is laid over the STr type MRAM cell array to form a layered structure. The STr type MRAM cell array serves as a work memory area, while the XP type MRAM cell array serves as a data storage area. A cell of the XP type MRAM cell array and a cell of the STr type MRAM cell array may be connected to a same bit-line. By passing predetermined current through the bit-line, and passing current through a first word-line connected to the cell of the XP type MRAM cell array, and through a second word-line connected to the cell of the STr type MRAM cell array, it is possible to simultaneously write data into the cells of the XP and STr type MRAM cell arrays.

Abstract: A magnetic memory device of the present invention includes a first wiring conductor having a first ability to flow a current therethrough, a second wiring conductor having a second ability larger than the first ability to flow a current therethrough, a magnetic memory cell having a pinned magnetic layer coupled to the second wiring conductor, a free magnetic layer coupled to the first wiring conductor and anon-magnetic layer sandwiched between the first and second magnetic layers. The first wiring conductor is made by aluminum and the second wiring conductor is made by copper.

Abstract: A nonvolatile storage device and method of operation capable of preventing opens in a word line and/or bit line that may result from electromigration is disclosed. A nonvolatile storage device according to an embodiment may include a number of magnetic resistance elements provided at intersections of word lines and bit lines, a word line control circuit for selecting one word line and supplying a write current thereto in a write operation, and a bit line control circuit for selecting one bit line and supplying a write current thereto. A word line control circuit can provide a bidirectional write current to a word line.

Abstract: A semiconductor memory device as claimed in the present invention has a reference cell, a first memory cell, a second memory cell located nearer the first memory cell than the reference cell and a data read circuit provided therein. The data read circuit identifies first data stored in the first memory cell based on a reference cell electrical state of the reference cell and a first electrical state of the first memory cell. Furthermore, the data read circuit identifies second data stored in the second memory cell based on the first electrical state of the first memory cell and a second electrical state of the second memory cell. The semiconductor memory device having such configuration is able to suppress influence of variation in electrical performance of memory cell and stably identify data stored in a memory cell.

Abstract: A magnetic memory of a present invention is formed as below. The magnetic memory has a TMR film formed on a first conductive film, and a second conductive film with a flat top surface, having the same plane shape as that of the TMR film, formed on the TMR laminated film. A first insulating film having a flat top surface and the same height as the surface of the second conductive film is formed so as to surround the TMR film and the second conductive film. A third conductive film connected electrically to the second conductive film is formed on the first insulating film.

Abstract: The present invention provides a memory cell array structure comprising: a plurality of cell array blocks aligned in matrix in both the row and column directions, and each of the cell array blocks including a plurality of magnetic memory cells; a plurality of main word lines being connected through sub-word switching devices to the same number of sub-word lines as a first number of the cell array blocks aligned in the row direction, and each of the sub-word lines being connected to at least one of the magnetic memory cells; and a plurality of main bit lines being connected through sub-bit switching devices to the same number of sub-bit lines as a second number of the cell array blocks aligned in the column direction, and each of the sub-bit lines being connected to at least one of the magnetic memory cells.

Abstract: A magnetic memory according to the present invention comprises: a single magnetic memory cell having at least first to third magnetic layers, a first tunnel insulating layer between the first and second magnetic layers and a second tunnel insulating layer between the second and third magnetic layers. The resistance between the first and third magnetic layers when magnetization of the first and second magnetic layers are in opposite directions is different from the resistance between the second and third magnetic layers when magnetization of the second and third magnetic layers are in opposite directions. Multiple data are therefore stored into the memory cell.

Abstract: A non-volatile memory device has a plurality of row lines extending in a first direction, a plurality of column lines extending in a second direction differing from the first direction, the plurality of column lines and the plurality of row lines forming a wiring matrix, a plurality of memory cells disposed at intersection points between the plurality of row lines and the plurality of column lines of the wiring matrix, each memory cell being formed by two ferromagnetic thin films and an insulation film therebetween, a wiring selection means for selecting at least one row line from the plurality of row lines and selecting at least one column line from the plurality of column lines, and a potential applying means for causing a prescribed current to flow in the selected row lines and column lines and applying to the row lines and column lines other than the selected row lines and column lines a prescribed potential which is not a ground potential.

Abstract: A method of manufacturing a magnetic random access memory for excluding stress-induced defects in memory cells. The method is composed of forming a first magnetic film over a substrate, forming a tunnel insulating film on the first magnetic film such that the tunnel insulating film has a curvature, forming a second magnetic film on the tunnel insulating film, and etching the first magnetic film, the tunnel insulating film and the second magnetic film to form a memory cell. The etching is executed such that the curvature is excluded from the memory cell.

Abstract: A method of forming a magnetic memory, includes, forming a first magnetic film over a substrate, forming a second magnetic film on the first magnetic film, forming a conductive film on second magnetic film, and forming a resist pattern on the conductive film. Then, a first pattern is formed by etching the conductive film using the resist pattern as a mask and the resist pattern is removed. Then, a first magnetic substance layer is formed by etching the second magnetic film using the first pattern as a mask.