Patents by Inventor Takeshi Oyamada

Takeshi Oyamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9842971
    Abstract: There is provided an electronic component mounting substrate which excels in resistance to migration, and is thus capable of maintaining high thermal conductivity and insulation performance for a long period of time. An electronic component mounting substrate includes: a metallic substrate formed of aluminum or an aluminum-based alloy; an alumite layer disposed on the metallic substrate, having a network of crevices at an upper surface thereof; and a ceramic layer disposed on the alumite layer, part of the ceramic layer extending into the crevices.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: December 12, 2017
    Assignee: KYOCERA Corporation
    Inventors: Seiichirou Itou, Tetsuya Tojo, Takeshi Oyamada, Yoshitada Konishi, Naoki Horinouchi
  • Publication number: 20170207369
    Abstract: There is provided an electronic component mounting substrate which excels in resistance to migration, and is thus capable of maintaining high thermal conductivity and insulation performance for a long period of time. An electronic component mounting substrate includes: a metallic substrate formed of aluminum or an aluminum-based alloy; an alumite layer disposed on the metallic substrate, having a network of crevices at an upper surface thereof; and a ceramic layer disposed on the alumite layer, part of the ceramic layer extending into the crevices.
    Type: Application
    Filed: September 24, 2015
    Publication date: July 20, 2017
    Applicant: KYOCERA Corporation
    Inventors: Seiichirou ITOU, Tetsuya TOJO, Takeshi OYAMADA, Yoshitada KONISHI, Naoki HORINOUCHI
  • Patent number: 8378704
    Abstract: A substrate is provided for a probe card assembly. The substrate includes an interconnection layer including a first surface having a first electrode set and a second surface having a second electrode set electrically connected to the first electrode set. The substrate further includes a base layer including a first surface having a third electrode set electrically connected to the second electrode set and a second surface having a plurality of contact terminals electrically connected to the third electrode set. And the substrate further includes a resin layer including a plurality of sublayers made of different materials. The resin layer is attached to the first surface of the base layer and the second surface of the interconnection layer.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 19, 2013
    Assignee: Kyocera Corporation
    Inventors: Seiichirou Itou, Masashi Miyawaki, Takeshi Oyamada
  • Publication number: 20080180118
    Abstract: A method of manufacturing a substrate for a probe card assembly comprises preparing an interconnection layer, preparing a resin layer and preparing a base layer. The method comprises attaching the resin layer to the interconnection layer by a first thermal process at a first temperature. The method comprises attaching the resin layer attached to the interconnection layer to the base layer by a second thermal process at a second temperature higher than the first temperature.
    Type: Application
    Filed: November 20, 2007
    Publication date: July 31, 2008
    Applicant: KYOCERA Corporation
    Inventors: Seiichirou ITOU, Masashi Miyawaki, Takeshi Oyamada
  • Patent number: 4747926
    Abstract: A conical-frustum-sputtering target for use in a magnetron sputtering apparatus for forming a film on a planar substrate. The sputtering target includes a target member having at least a conical-frustum-shaped surface including a first surface portion parallel to a center portion of the planar substrate and spaced a first distance therefrom, a second surface portion parallel to at least an extension of a peripheral portion of the planar substrate and being spaced a second distance therefrom wherein the second distance is less than the first distance, and at least one-third surface portion inclined with respect to the planar substrate for interconnecting the first surface portion and the second surface portion. By utilizing such a sputtering target, a film having a uniform thickness can be formed on a substrate having side steps and such can be utilized to deposit metallic thin film for a minute wiring pattern and can be applied to a larger substrate.
    Type: Grant
    Filed: February 4, 1986
    Date of Patent: May 31, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Tamotsu Shimizu, Hikaru Nishijima, Takeshi Oyamada, Shigeru Kobayashi
  • Patent number: 4610774
    Abstract: A sputtering target structure suitable for use with a planar magnetron sputtering electrode device has a plurality of annular target members arranged concentrically. The annular target member is provided with either an annular groove for concentration of an electric field or an annular wall for repelling electrons.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: September 9, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Masao Sakata, Shigeru Kobayashi, Katsuo Abe, Hideaki Shimamura, Tsuneaki Kamei, Osamu Kasahara, Hidetsugu Ogishi, Takeshi Oyamada