Patents by Inventor Takeshi OYANAGI
Takeshi OYANAGI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230283253Abstract: A notch filter 100 includes a varistor 1 that is connected between a signal line SL and a ground G. The varistor 1 has a capacitive component and outputs a signal with a second frequency different from a signal with a first frequency flowing in the signal line SL and a signal with the second frequency superimposed on the signal line SL to the ground G.Type: ApplicationFiled: January 19, 2023Publication date: September 7, 2023Applicant: TDK CORPORATIONInventors: Katsunari MORIAI, Shunsuke OGURA, Takeshi OYANAGI, Ryo MORITA, Yusuke IMAI
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Patent number: 11682504Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.Type: GrantFiled: March 7, 2022Date of Patent: June 20, 2023Assignee: TDK CORPORATIONInventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
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Patent number: 11594351Abstract: A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.Type: GrantFiled: November 23, 2021Date of Patent: February 28, 2023Assignee: TDK CORPORATIONInventors: Shin Kagaya, Masayuki Uchida, Naoyoshi Yoshida, Takeshi Yanata, Satoshi Goto, Takeshi Oyanagi, Yusuke Imai, Daiki Suzuki, Kaname Ueda
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Publication number: 20220189665Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.Type: ApplicationFiled: March 7, 2022Publication date: June 16, 2022Applicant: TDK CORPORATIONInventors: Satoshi GOTO, Naoyoshi YOSHIDA, Takeshi YANATA, Takeshi OYANAGI, Daiki SUZUKI, Shin KAGAYA, Masayuki UCHIDA, Yusuke IMAI
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Publication number: 20220165460Abstract: A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.Type: ApplicationFiled: November 23, 2021Publication date: May 26, 2022Applicant: TDK CORPORATIONInventors: Shin KAGAYA, Masayuki UCHIDA, Naoyoshi YOSHIDA, Takeshi YANATA, Satoshi GOTO, Takeshi OYANAGI, Yusuke IMAI, Daiki SUZUKI, Kaname UEDA
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Patent number: 11302464Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.Type: GrantFiled: April 14, 2021Date of Patent: April 12, 2022Assignee: TDK CORPORATIONInventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
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Publication number: 20210327616Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.Type: ApplicationFiled: April 14, 2021Publication date: October 21, 2021Applicant: TDK CORPORATIONInventors: Satoshi GOTO, Naoyoshi YOSHIDA, Takeshi YANATA, Takeshi OYANAGI, Daiki SUZUKI, Shin KAGAYA, Masayuki UCHIDA, Yusuke IMAI
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Patent number: 10096408Abstract: A voltage nonlinear resistor ceramic comprises: a Zn oxide; a Co oxide; an R (specific rare earth) oxide; a Cr oxide; an M1 (Ca, Sr) oxide; an M2 (Al, Ga, In) oxide; and strontium titanate. When content of the Zn oxide is assumed to be 100 mole portion in terms of Zn, content of the Co oxide is 0.30 to 10 mole portion in terms of Co, content of the R oxide is 0.10 to 10 mole portion in terms of R, content of the Cr oxide is 0.01 to 2 mole portion in terms of Cr, content of the M1 oxide is 0.10 to 5 mole portion in terms of M1, content of the M2 oxide is 0.0005 to 5 mole portion in terms of M2, and content of the strontium titanate is 0.10 to 5 mole portion in terms of SrTiO3.Type: GrantFiled: June 17, 2016Date of Patent: October 9, 2018Assignee: TDK CORPORATIONInventors: Masayuki Uchida, Takahiro Itami, Naoyoshi Yoshida, Takeshi Oyanagi, Koki Yamada, Kazuaki Kajiwara
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Patent number: 9762203Abstract: A piezoelectric device has: a ceramic substrate having a first principal surface and a second principal surface opposed to each other; a piezoelectric element arranged on the first principal surface; a frame having a first face and a second face opposed to each other and arranged on the ceramic substrate so as to surround the piezoelectric element; a metal layer arranged on the second face of the frame; and a metal lid arranged on the metal layer so as to close a space surrounded by the frame. The first face of the frame is in contact with the first principal surface of the ceramic substrate. The metal layer and the metal lid are joined to each other by resistance welding. The frame has a composite portion containing a metal and a metal oxide and the composite portion includes the second face and is in contact with the metal layer.Type: GrantFiled: January 14, 2015Date of Patent: September 12, 2017Assignee: TDK CORPORATIONInventors: Takeshi Yanata, Yo Saito, Kazuto Takeya, Katsunari Moriai, Takashi Inagaki, Takahiro Itami, Takeshi Oyanagi, Hitoshi Ishida
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Patent number: 9726552Abstract: Provided is a piezoelectric device capable of improving measurement precision of a temperature of a piezoelectric element. A piezoelectric device (1) includes a package (2) including a housing member (4) having a thermistor substrate (3) and a frame (7) provided to project from a first main surface (3a) of the thermistor substrate (3) and in which a housing part (6) is formed by the first main surface (3a) and the frame (7) and a lid (9) provided on the frame (7) to cover a space (5) of the housing part (6), and a piezoelectric vibration element (5) provided on the first main surface (3a) of the thermistor substrate (3) in the housing part (6), wherein the thermistor substrate (3) is a multilayer negative temperature coefficient (NTC) thermistor.Type: GrantFiled: March 9, 2015Date of Patent: August 8, 2017Assignee: TDK CORPORATIONInventors: Takeshi Yanata, Yo Saito, Kazuto Takeya, Katsunari Moriai, Takashi Inagaki, Takahiro Itami, Takeshi Oyanagi, Hitoshi Ishida
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Publication number: 20160379739Abstract: A voltage nonlinear resistor ceramic comprises: a Zn oxide; a Co oxide; an R (specific rare earth) oxide; a Cr oxide; an M1 (Ca, Sr) oxide; an M2 (Al, Ga, In) oxide; and strontium titanate. When content of the Zn oxide is assumed to be 100 mole portion in terms of Zn, content of the Co oxide is 0.30 to 10 mole portion in terms of Co, content of the R oxide is 0.10 to 10 mole portion in terms of R, content of the Cr oxide is 0.01 to 2 mole portion in terms of Cr, content of the M1 oxide is 0.10 to 5 mole portion in terms of M1, content of the M2 oxide is 0.0005 to 5 mole portion in terms of M2, and content of the strontium titanate is 0.10 to 5 mole portion in terms of SrTiO3.Type: ApplicationFiled: June 17, 2016Publication date: December 29, 2016Inventors: Masayuki UCHIDA, Takahiro ITAMI, Naoyoshi YOSHIDA, Takeshi OYANAGI, Koki YAMADA, Kazuaki KAJIWARA
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Publication number: 20150276504Abstract: Provided is a piezoelectric device capable of improving measurement precision of a temperature of a piezoelectric element. A piezoelectric device (1) includes a package (2) including a housing member (4) having a thermistor substrate (3) and a frame (7) provided to project from a first main surface (3a) of the thermistor substrate (3) and in which a housing part (6) is formed by the first main surface (3a) and the frame (7) and a lid (9) provided on the frame (7) to cover a space (5) of the housing part (6), and a piezoelectric vibration element (5) provided on the first main surface (3a) of the thermistor substrate (3) in the housing part (6), wherein the thermistor substrate (3) is a multilayer negative temperature coefficient (NTC) thermistor.Type: ApplicationFiled: March 9, 2015Publication date: October 1, 2015Inventors: Takeshi YANATA, Yo SAITO, Kazuto TAKEYA, Katsunari MORIAI, Takashi INAGAKI, Takahiro ITAMI, Takeshi OYANAGI, Hitoshi ISHIDA
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Publication number: 20150249199Abstract: A piezoelectric device has: a ceramic substrate having a first principal surface and a second principal surface opposed to each other; a piezoelectric element arranged on the first principal surface; a frame having a first face and a second face opposed to each other and arranged on the ceramic substrate so as to surround the piezoelectric element; a metal layer arranged on the second face of the frame; and a metal lid arranged on the metal layer so as to close a space surrounded by the frame. The first face of the frame is in contact with the first principal surface of the ceramic substrate. The metal layer and the metal lid are joined to each other by resistance welding. The frame has a composite portion containing a metal and a metal oxide and the composite portion includes the second face and is in contact with the metal layer.Type: ApplicationFiled: January 14, 2015Publication date: September 3, 2015Inventors: Takeshi YANATA, Yo SAITO, Kazuto TAKEYA, Katsunari MORIAI, Takashi INAGAKI, Takahiro ITAMI, Takeshi OYANAGI, Hitoshi ISHIDA
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Publication number: 20150077489Abstract: A pigment dispersion containing metal pigment, wherein the metal pigment contains plate-like particles, and in the case where the longitudinal diameter on the planar surface of the plate-like particle is X, the lateral diameter is Y, and the thickness is Z, the 50% average particle diameter R50 of a corresponding circle determined from the surface area in the X-Y plane of the plate-like particle is between 0.5 and 3 ?m, and the condition R50/Z>5 is satisfied.Type: ApplicationFiled: November 21, 2014Publication date: March 19, 2015Inventors: Takeshi OYANAGI, Keitaro NAKANO