Patents by Inventor Takeshi Saijo

Takeshi Saijo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8127144
    Abstract: A program loader for loading a program onto a memory in accordance with load-destination information. The program loader including an obtaining unit obtaining the load-destination information from a recording medium in which the program is recorded, a verifying unit verifying whether or not the load-destination information has been tampered with, and a loading unit loading the program. The load-destination information indicates a memory area which is part of an address space in the memory, wherein an execution image of the program is to be stored in the address space, and if when the verifying unit verifies that the load-destination information has not been tampered with, the loading unit generates, as the loading of the program, the execution image in the memory area indicated by the load-destination information, such that the execution image is executed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: February 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Norihisa Isogai, Takeshi Saijo, Takashi Suzuki
  • Publication number: 20070083768
    Abstract: A program loader-for loading a program onto a memory in accordance with load-destination information, the program loader including: an obtaining unit operable to obtain the load-destination information from a recording medium in which the program is recorded; a verifying unit operable to verify whether or not the load-destination information has been tampered with; and a loading unit operable to load the program. The load-destination information indicates a memory area which is part of an address space in the memory, wherein an execution image of the program is to be stored in the address space, and if the verifying unit verifies that the load-destination information has not been tampered with, the loading unit generates, as the loading of the program, the execution image in the memory area indicated by the load-destination information, such that the execution image is executed.
    Type: Application
    Filed: October 11, 2006
    Publication date: April 12, 2007
    Inventors: Norihisa Isogai, Takeshi Saijo, Takashi Suzuki
  • Publication number: 20030221131
    Abstract: A data processing device for share-encoding secret information using a (k,n) threshold scheme, where k and n are integers greater than or equal to 2, and k is less than or equal to n.
    Type: Application
    Filed: March 5, 2003
    Publication date: November 27, 2003
    Inventors: Toshifumi Mori, Takeshi Saijo
  • Patent number: 6523115
    Abstract: In a cryptography system, plaintext storage unit 101 stores a plaintext. Encryption unit 102 encrypts the plaintext to generate a ciphertext. First verification data generating unit 104 generates first verification data, and second verification data generating unit 106 generates second verification data. Decryption unit 114 decrypts the ciphertext to generate a decrypted plaintext. First verification unit 116 performs verification using the decrypted plaintext and the first verification data. Second verification unit 117 performs verification using the first verification data, the ciphertext, and the second verification data. Display unit 112 displays the results of the verifications.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: February 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takatoshi Ono, Takeshi Saijo
  • Patent number: 6501840
    Abstract: The output data storage unit 126 allocates a memory area and stores cipher text and plain text; the input data size calculation unit 127 calculates the sizes of cipher text and plain text; the type storage unit 128 stores a cryptographic processing type and an algorithm type; the type providing unit 129 outputs the cryptographic processing type and the algorithm type to the type information storage unit 113; the type information storage unit 113 stores an output size table, cryptographic processing type information, and algorithm type information; the output data size judgement unit 114 calculates an output data size according to an input data size, the cryptographic processing type, and the algorithm type.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: December 31, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takeshi Saijo
  • Patent number: 6496930
    Abstract: A message receiving apparatus for receiving messages from a message transmitting apparatus generates first data for producing a display which urges a user of the message transmitting apparatus to input a message, and generates second data within the first data for specifying a conversion type for secret communication of the message. The message receiving apparatus sends the first data including the second data to the message transmitting apparatus and subsequently receives the message from the message transmitting apparatus. The message transmitting apparatus for transmitting messages to the message receiving apparatus receives the first data for producing the display and the accompanying second data for specifying the conversion type and produces the display according to the first data.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: December 17, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takatoshi Ono, Takeshi Saijo, Makoto Tatebayashi, Syunji Harada, Yasuo Okumura