Patents by Inventor Takeshi Shimoyama

Takeshi Shimoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8583842
    Abstract: Disclosed herein is a data transfer device to which a master device that issues transfer requests and slave devices each having a function of responding to the transfer request may be connected. The device may include a transfer request counter that counts up or down each time a response signal is inputted thereto from any slave device, and counts down or up each time a data transfer completion signal is inputted thereto; a transfer destination selector that, based on a count value of the counter and information concerning a transfer-target slave device, determines and selects one of the slave devices as a destination of the transfer request, and connects the master device with the selected slave device; and a data transfer monitoring section that monitors completion of data transfer corresponding to the transfer request and, upon recognizing the completion, outputs the data transfer completion signal to the counter.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: November 12, 2013
    Assignee: Sony Corporation
    Inventors: Shigetoshi Sugiyama, Takeshi Shimoyama
  • Patent number: 8350421
    Abstract: A motor may include a stator formed with a rotor arrangement hole, a rotor disposed in the rotor arrangement hole, and a plate-like member disposed on at least one end side in an axial direction of the stator. The plate-like member is joined with an end face of the stator structured such that a peripheral edge part of the plate-like member is melted. In this case, it is preferable that the peripheral edge part of the plate-like member is joined with the end face of the stator structured such that an edge part on an opposite side to a face contacting with the end face of the stator is melted by irradiation of a laser beam.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: January 8, 2013
    Assignee: Nidec Sankyo Corporation
    Inventor: Takeshi Shimoyama
  • Publication number: 20120008782
    Abstract: A data processing apparatus includes an address bus, a scramble unit, and a data bus. The address bus outputs address data to be given to a memory apparatus. The scramble unit scrambles write-in data into a storage position in the memory apparatus identified by the address data to obtain confidential data. The data bus outputs the confidential data. The scramble unit includes a first scrambler, a first converter and a second scrambler. The first scrambler XORs first mask data corresponding to the address data and the write-in data for each bit and makes it first scrambled data. The first converter performs one-to-one substitution conversion of the first scrambled data. The second scrambler XORs second mask data corresponding to the address data and data after the conversion of the first scrambled data by the first converter and outputs obtained second scrambled data as the confidential data.
    Type: Application
    Filed: September 20, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuyoshi FURUKAWA, Takeshi Shimoyama, Masahiko Takenaka
  • Patent number: 8068150
    Abstract: A memory access control apparatus includes a memory controller controlling a memory adopting a DDR format; a DDR-PHY adjusting the timing of an interface signal between the memory controller and the memory; a DDR-PHY controller controlling the DDR-PHY; and a clock controller controlling the frequency of a clock signal. A first request signal for controlling the operation of the memory in a self-refresh mode is supplied to the memory controller, a second request signal for resetting the DDR-PHY is supplied to the DDR-PHY controller, a third request signal for changing the clock frequency is supplied to the clock controller, a fourth request signal for setting a parameter for the DDR-PHY is supplied to the DDR-PHY controller, and a fifth request signal for canceling the operation of the memory in the self-refresh mode is supplied to the memory controller in order to change the clock frequency of the memory.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: November 29, 2011
    Assignee: Sony Corporation
    Inventors: Tomohiro Koganezawa, Takeshi Shimoyama, Kingo Koyama, Takuji Himeno
  • Patent number: 8065458
    Abstract: An information processing apparatus configured to control communications of a plurality of devices via a common communication channel on the basis of predetermined priority levels of the devices includes a changing unit configured to change the priority level of a predetermined device, which is one of the plurality of devices, having a first priority level to a second priority level for a predetermined amount of time and a controlling unit configured to control the length of the predetermined amount of time.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventors: Yoshito Nagao, Takeshi Shimoyama
  • Patent number: 8026646
    Abstract: A motor may include a rotor having a rotation shaft, a stator disposed on an outer peripheral side of the rotor, a frame fixed to the stator, and an urging member made of metal for urging an end part on an output side of the rotation shaft to an opposite-to-output side. The frame includes a bottom face part, a stator fixing part which is formed to be bent from the bottom face part and which is fixed to the stator, and a shaft support part which is formed to be bent from the bottom face part so as to face the stator fixing part and which supports the end part on the output side of the rotation shaft, and the urging member is fixed by welding to an output side face which is a face on an output side of the shaft support part. The urging member is preferably a flat spring.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: September 27, 2011
    Assignee: Nidec Sankyo Corporation
    Inventor: Takeshi Shimoyama
  • Patent number: 8018101
    Abstract: A motor may include a rotor having a rotation shaft, a stator disposed on an outer peripheral side of the rotor, an output side bearing which supports an end part on an output side of the rotation shaft in a radial direction and an axial direction, a frame which is provided with a bearing holding part for holding the output side bearing and which is fixed to the stator, and an urging member which is attached to the bearing holding part for urging the output side bearing to an opposite-to-output side. The bearing holding part is formed with a bearing hole which penetrates through the bearing holding part and on which the output side bearing is disposed, and the output side bearing is disposed on the bearing hole in a movable state in the axial direction of the rotation shaft.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: September 13, 2011
    Assignee: Nidec Sankyo Corporation
    Inventor: Takeshi Shimoyama
  • Patent number: 8001799
    Abstract: In an air-conditioning system for a vehicle, which has multiple heat sources (an evaporator and a heat accumulator), either one of the heat sources, for which the input energy amount for the unit cooling capacity is smaller than that for the other heat source, is preferentially used for performing the cooling operation, an energy amount for the air-conditioning operation can be reduced.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: August 23, 2011
    Assignee: Denso Corporation
    Inventors: Kazuyoshi Obayashi, Keisuke Tani, Katsunori Tanaka, Naoki Yamamoto, Takeshi Shimoyama, Yukihiro Yamashita
  • Publication number: 20110162071
    Abstract: An anti-worm-measure parameter determining apparatus determines parameters for controlling timing for an anti-worm-measure means to start blocking of a communication by a worm in a network, for preventing a spread of the worm. An infectivity calculating unit calculates infectivity of the worm based on number of nodes connected to the network. A number-of-infected-nodes estimating unit calculates an expected value of number of infected nodes at a time when the worm transmits a predetermined number of packets, based on the infectivity calculated by the infectivity calculating unit.
    Type: Application
    Filed: March 7, 2011
    Publication date: June 30, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Kazumasa Omote, Takeshi Shimoyama
  • Patent number: 7926110
    Abstract: An anti-worm-measure parameter determining apparatus determines parameters for controlling timing for an anti-worm-measure means to start blocking of a communication by a worm in a network, for preventing a spread of the worm. An infectivity calculating unit calculates infectivity of the worm based on number of nodes connected to the network. A number-of-infected-nodes estimating unit calculates an expected value of number of infected nodes at a time when the worm transmits a predetermined number of packets, based on the infectivity calculated by the infectivity calculating unit.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: April 12, 2011
    Assignee: Fujitsu Limited
    Inventors: Kazumasa Omote, Takeshi Shimoyama
  • Patent number: 7793134
    Abstract: An information processing apparatus includes a clock signal generator unit that generates a clock signal which is variable in frequency. The information processing apparatus also includes a timing information calculator unit that calculates timing information corresponding to frequency information about the clock signal and acquires the frequency information before a variation in the clock signal. The information processing apparatus further includes an information processor unit that executes an information processing operation for a memory at an execution timing which is controlled by the timing information. The clock signal is supplied to the information processor unit as an operating clock signal.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 7, 2010
    Assignee: Sony Corporation
    Inventor: Takeshi Shimoyama
  • Patent number: 7701094
    Abstract: A motor may include a rotor having a rotor shaft and a magnet, at least a stator core disposed around the rotor and provided with a plurality of pole teeth, and at least a coil mounted on the stator core. The stator core includes a terminal block mounting part which is formed so as to protrude on an outer side from the stator core, and a terminal block supporting terminals for the coil is integrally mounted on the terminal block mounting part. The terminal block mounting part may be formed with at least an engaging protruded part and the terminal block is integrated with the engaging protruded part by insert molding or outsert molding.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: April 20, 2010
    Assignee: Nidec Sankyo Corporation
    Inventor: Takeshi Shimoyama
  • Patent number: 7664577
    Abstract: According to the present invention, a control apparatus for an electric generator includes a power generation cost determiner determining a power generation cost of the generator, a threshold determiner determining a threshold of power generation cost as a function of a state of charge of an electric energy storage device, a comparator comparing the power generation cost of the generator with the threshold, and a controller. When the power generation cost of the generator is lower than the threshold, the controller controls the generator to generate an increased amount of electric power, so as to both charge the electric energy storage device and feed an electrical load. Otherwise, when the power generation cost of the generator is higher than the threshold, the controller controls the generator to generate a decreased amount of electric power, so as to allow the electric energy storage device to discharge to feed the electrical load.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: February 16, 2010
    Assignee: Denso Corporation
    Inventors: Hiroyoshi Yamamoto, Takeshi Shimoyama, Katsunori Tanaka, Akira Kato
  • Publication number: 20100007770
    Abstract: A memory access control apparatus includes a memory controller controlling a memory adopting a DDR format; a DDR-PHY adjusting the timing of an interface signal between the memory controller and the memory; a DDR-PHY controller controlling the DDR-PHY; and a clock controller controlling the frequency of a clock signal. A first request signal for controlling the operation of the memory in a self-refresh mode is supplied to the memory controller, a second request signal for resetting the DDR-PHY is supplied to the DDR-PHY controller, a third request signal for changing the clock frequency is supplied to the clock controller, a fourth request signal for setting a parameter for the DDR-PHY is supplied to the DDR-PHY controller, and a fifth request signal for canceling the operation of the memory in the self-refresh mode is supplied to the memory controller in order to change the clock frequency of the memory.
    Type: Application
    Filed: June 18, 2009
    Publication date: January 14, 2010
    Applicant: Sony Corporation,
    Inventors: Tomohiro KOGANEZAWA, Takeshi Shimoyama, Kingo Koyama, Takuji Himeno
  • Publication number: 20100001594
    Abstract: A motor may include a rotor having a rotation shaft, a stator disposed on an outer peripheral side of the rotor, an output side bearing which supports an end part on an output side of the rotation shaft in a radial direction and an axial direction, a frame which is provided with a bearing holding part for holding the output side bearing and which is fixed to the stator, and an urging member which is attached to the bearing holding part for urging the output side bearing to an opposite-to-output side. The bearing holding part is formed with a bearing hole which penetrates through the bearing holding part and on which the output side bearing is disposed, and the output side bearing is disposed on the bearing hole in a movable state in the axial direction of the rotation shaft.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 7, 2010
    Applicant: NIDEC SANKYO CORPORATION
    Inventor: Takeshi SHIMOYAMA
  • Publication number: 20100001600
    Abstract: A motor may include a rotor having a rotation shaft, a stator disposed on an outer peripheral side of the rotor, a frame fixed to the stator, and an urging member made of metal for urging an end part on an output side of the rotation shaft to an opposite-to-output side. The frame includes a bottom face part, a stator fixing part which is formed to be bent from the bottom face part and which is fixed to the stator, and a shaft support part which is formed to be bent from the bottom face part so as to face the stator fixing part and which supports the end part on the output side of the rotation shaft, and the urging member is fixed by welding to an output side face which is a face on an output side of the shaft support part. The urging member is preferably a flat spring.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 7, 2010
    Applicant: NIDEC SANKYO CORPORATION
    Inventor: Takeshi SHIMOYAMA
  • Publication number: 20090179512
    Abstract: A motor may include a stator formed with a rotor arrangement hole, a rotor disposed in the rotor arrangement hole, and a plate-like member disposed on at least one end side in an axial direction of the stator. The plate-like member is joined with an end face of the stator structured such that a peripheral edge part of the plate-like member is melted. In this case, it is preferable that the peripheral edge part of the plate-like member is joined with the end face of the stator structured such that an edge part on an opposite side to a face contacting with the end face of the stator is melted by irradiation of a laser beam.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 16, 2009
    Applicant: NIDEC SANKYO CORPORATION
    Inventor: Takeshi SHIMOYAMA
  • Patent number: 7493508
    Abstract: This invention relates to an information processing apparatus as well as to an information processing method and a program for use therewith, the apparatus being arranged to prevent a drop in its processing performance while minimizing power dissipation when a frequency-variable synchronizing clock signal CLK of the apparatus is lowered in frequency. Illustratively, if a selector block 31-2 receives a selection command “select B” which is set depending on the frequency of the synchronizing clock signal CLK and which specifies the bypassing of a holding block 12-2, then data input to and held by a holding block 12-1 on a first clock pulse of the clock signal CLK is arranged, on a second clock pulse, to pass through a selector block 31-1 and a signal processing block 13-1, bypass the holding block 12-2, pass through the selector block 31-2 and a signal processing block 13-2, and be input to and held by a holding block 12-3.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: February 17, 2009
    Assignee: Sony Corporation
    Inventor: Takeshi Shimoyama
  • Patent number: 7459801
    Abstract: An electric generator control apparatus of a vehicle sets respective target values of output voltage and output current for the electric generator of the vehicle, and selectively establishes a voltage control mode for holding the generator output voltage at the target voltage or a current control mode for holding the generator output current at the target current, with the mode selection and the setting of target values being performed based on criteria such as the level of charge of the vehicle battery, the electrical load of the vehicle equipment, etc.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: December 2, 2008
    Assignee: Denso Corporation
    Inventors: Takeshi Shimoyama, Katsunori Tanaka, Kazuyoshi Obayashi, Keisuke Tani, Yukihiro Yamashita, Daisuke Kuroda
  • Patent number: 7437592
    Abstract: An information processing apparatus and an information processing method for use therewith are provided so as to implement optimal signal processing without deterioration of performance when using variable operating frequencies. A frequency information operating section (12) of the apparatus adds a corresponding signal cycle to frequency information Inf about a synchronizing clock signal CLKv having a variable frequency. An information processing section of the apparatus is supplied with the synchronizing clock signal as an operating clock signal, and processes information when results of the addition by the frequency information operating section (12) meet a predetermined condition. Optimized processing is thus accomplished in a manner eliminating wasteful latency times.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: October 14, 2008
    Assignee: Sony Corporation
    Inventor: Takeshi Shimoyama