Abstract: An object is to provide a method for easily producing maleimide (MI) in which trace amounts of residual acid components as impurities in a crude MI are efficiently reduced, that is, the acid value is sufficiently reduced. <1> A method for producing purified MI, comprising reducing an acid value of crude MI by 50% or more, by adding carbodiimide (CDI) to a solution comprising the crude MI to react an acid component in the crude MI with the CDI. <2> The method for producing purified MI, comprising adding 0.5% by mass or more and 8% by mass or less of the CDI with respect to a mass of the crude MI for reaction. <3> The method for producing purified MI, wherein the CDI is N,N?-diisopropyl carbodiimide (DIC). <4> The method for producing purified MI, comprising removing a urea derivative of the CDI (CDI-U) by-produced when reacting the acid component in the crude MI with the CDI.

Abstract: A laser processing apparatus includes a support unit that supports a wafer including a plurality of functional elements disposed adjacent to each other via a street, an irradiation unit that irradiates the street with laser light, and a control unit that controls the irradiation unit based on information about the streets so that a first region and a second region of the street are simultaneously irradiated with the laser light, and a power of the laser light for removing a surface layer of the street in the first region is higher than a power for removing the surface layer of the street in the first region. The information about the street includes information that a processing threshold value indicating a difficulty of laser processing in the first region is lower than a processing threshold value in the second region.

Abstract: A memory includes first cell layers respectively including first cells, and a second cell layer including dummy cells. A first wire is connected to the first cells arrayed in a first direction. A second wire is connected to the dummy cells arrayed in the first direction. A third wire is connected to the first cells and one of the dummy cells arrayed in a second direction. A fourth wire is connected to the third wires arrayed in a third direction. A first voltage is applied to a selected first wire when reading data from a selected first cell, and transmits a read data to a selected fourth wire connected to the selected first cell. A reference voltage is applied to a non-selected fourth wire. A second voltage is applied to a selected second wire provided with the dummy cell between the selected second wire and the non-selected fourth wire.

Abstract: An inversion mechanism inverts a first container held by a holding mechanism with a first opening directed upward, and directs the first opening downward. A movement mechanism moves the holding mechanism so that the first opening directed downward faces a second opening from above. The opening and closing drive mechanism brings an opening and closing member into the closed state while the holding mechanism is inverted by the inversion mechanism and while the holding mechanism is moved by the movement mechanism, and brings the opening and closing member into the open state in response to the first opening facing the second opening.

Abstract: An autonomous mobile robot includes a first arithmetic unit configured to calculate a course direction based on an own position, a moving-object position, and a moving-object velocity vector, the course direction being a direction in which the autonomous mobile robot should travel, a second arithmetic unit configured to input the own position, the moving-object position, the moving-object velocity vector, and the course direction into a trained model and thereby calculate an estimated position, the trained model being a model that has been trained, the estimated position being a position at which the autonomous mobile robot is estimated to arrive a predetermined time later without colliding with the moving object, a generating unit configured to generate a remaining route from the estimated position to a destination, and a movement control unit configured to control a movement to the destination based on the course direction and the remaining route.

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

Abstract: According to the embodiment, in a first period, the semiconductor storage device maintains the switch in an ON state. In a second period, the semiconductor storage device performs a first operation, a second operation and a third operation while maintaining the switch in an OFF state. The second period is a period after the first period. The first operation is an operation to supply the first pulse having the first polarity from the first pulse generation circuit to the other end of the first capacitive element. The second operation is an operation to supply the second pulse having the second polarity from the second pulse generation circuit to the other end of the second capacitive element. The third operation is an operation to connect the first bit line to the first data line.

Abstract: According to the embodiment, in a first period, the semiconductor storage device maintains the switch in an ON state. In a second period, the semiconductor storage device performs a first operation, a second operation and a third operation while maintaining the switch in an OFF state. The second period is a period after the first period. The first operation is an operation to supply the first pulse having the first polarity from the first pulse generation circuit to the other end of the first capacitive element. The second operation is an operation to supply the second pulse having the second polarity from the second pulse generation circuit to the other end of the second capacitive element. The third operation is an operation to connect the first bit line to the first data line.

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

Abstract: A semiconductor memory device includes: first wirings; second wirings intersecting the first wirings; and memory cells. Each of the memory cells is respectively formed between one of the first wirings and one of the second wirings. In a set operation, a set pulse is supplied between one of the first wirings and one of the second wirings. In a reset operation, a reset pulse is supplied between one of the first wirings and one of the second wirings. In a first operation, a first pulse is supplied between one of the first wirings and one of the second wirings. the first pulse has an amplitude equal to or greater than the greater of an amplitude of the set pulse and an amplitude of the reset pulse and has a pulse width greater than a pulse width of the set pulse.

Abstract: According to one embodiment, there is provided a semiconductor storage device including N word lines, M bit lines, multiple memory cells, and a read circuit. N is an integer of four or greater. M is an integer of two or greater. The M bit lines intersect with the word lines. The multiple memory cells are placed at positions where the word lines and the bit lines intersect. The memory cell stores binary data. The read circuit is connected to the M bit lines. The read circuit is able to detect levels of a multi-ary signal.

Abstract: An autonomous mobile robot includes a first arithmetic unit configured to calculate a course direction based on an own position, a moving-object position, and a moving-object velocity vector, the course direction being a direction in which the autonomous mobile robot should travel, a second arithmetic unit configured to input the own position, the moving-object position, the moving-object velocity vector, and the course direction into a trained model and thereby calculate an estimated position, the trained model being a model that has been trained, the estimated position being a position at which the autonomous mobile robot is estimated to arrive a predetermined time later without colliding with the moving object, a generating unit configured to generate a remaining route from the estimated position to a destination, and a movement control unit configured to control a movement to the destination based on the course direction and the remaining route.

Abstract: A semiconductor memory device includes: first wirings; second wirings intersecting the first wirings; and memory cells. Each of the memory cells is respectively formed between one of the first wirings and one of the second wirings. In a set operation, a set pulse is supplied between one of the first wirings and one of the second wirings. In a reset operation, a reset pulse is supplied between one of the first wirings and one of the second wirings. In a first operation, a first pulse is supplied between one of the first wirings and one of the second wirings. the first pulse has an amplitude equal to or greater than the greater of an amplitude of the set pulse and an amplitude of the reset pulse and has a pulse width greater than a pulse width of the set pulse.

Abstract: A polyphenylene sulfide short fiber has a monofilament fineness of 0.70 to 0.95 dtex, a strength of 4.5 to 5.5 cN/dtex, a fiber length of 20 to 100 mm, and a melt flow rate (MFR) value of 200 to 295 g/10 min. The polyphenylene sulfide short fiber enables improvements to be made in the dust collection performance and mechanical strength without impairing the fiber productivity or felt productivity.

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

Abstract: A laminated polyarylene sulfide heat-resistant filter has a plurality of layers, at least including a first web layer that is a filtering surface, and a second web layer that is a non-filtering surface, the laminated polyarylene sulfide heat-resistant filter being characterized in that the first web layer contains 30 to 70 wt % of polyarylene sulfide fibers having a fineness of 0.5 to 1.2 dtex, and 30 to 70 wt % of polyarylene sulfide fibers having a fineness of 1.3 to 3.0 dtex taking a total of a weight percentages of the first web layer as 100 wt %, wherein the second web layer contains polyarylene sulfide fibers having a fineness of 1.0 to 4.0 dtex.

Abstract: According to the embodiment, a semiconductor memory device includes a first conductive layer, a second conductive layer, a first memory cell, a second memory cell, a third conductive layer, a first contact, a intermediate memory cell, a fourth conductive layer, a third memory cell, a fifth conductive layer, and a second contact. The third conductive layer is separated from the first conductive layer and the second conductive layer in a third direction crossing a first direction and crossing a second direction and extends in the second direction. The fifth conductive layer is separated from the second conductive layer in the third direction and extends in the second direction. A first length of the second conductive layer along the second direction is shorter than a second length of the fifth conductive layer along the second direction.

Abstract: A conveyance seat configured to stabilize a position of a temperature detection unit to suppress positional deviation of the temperature detection unit is described. The conveyance seat comprises a cushion pad, a bottom plate, an electric heater which is attached to the cushion pad, a thermistor which detects temperature at a location between the cushion pad and the bottom plate during operation of the electric heater, a housing cavity with a hollowed shape formed in a bottom portion of the cushion pad, and a holding pad which holds the thermistor within the housing cavity by being fit in the housing cavity with the thermistor attached thereto. The thermistor is held by the holding pad, and is positioned between the cushion pad and the holding pad, within the housing cavity.

Abstract: A refrigeration cycle apparatus using refrigerant including HFO-1123, the refrigeration cycle apparatus including a compressor, a condenser, an expansion valve, and an evaporator connected in a loop, and a cooling unit configured to cool the refrigerant at an inlet of the expansion valve.