Patents by Inventor Takeshi Sunaga

Takeshi Sunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10186496
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: January 22, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga
  • Patent number: 10160883
    Abstract: There is provided a room-temperature-curable polyorganosiloxane composition having low viscosity and good coatability without any solvent and forming a cured coating film excellent in scratch resistance. The room-temperature-curable polyorganosiloxane composition contains: (A) 100 parts by mass of a mixture of (A1) 10 to 80 parts by mass of a polyorganosiloxane having two or more alkoxy groups bonded to silicon atoms and a prescribed viscosity, and (A2) 90 to 20 parts by mass of a polyorganosiloxane represented by an average composition formula: R1aSi(OR2)bO{4?(a+b)}/2 (R1 and R2 represent prescribed group respectively, and a and b are prescribed positive numbers), having an Mw of 2,000 to 100,000 and a three-dimensional network structure, and being in a solid state or in a semisolid state at normal temperature; and (B) 0.1 to 15 parts by mass of an organic titanium compound.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: December 25, 2018
    Assignee: MOMENTIVE PERFORMANCE MATERIALS JAPAN LLC
    Inventors: Isao Iida, Takeshi Sunaga
  • Publication number: 20170207192
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Inventors: AKIHIRO KIMURA, TAKESHI SUNAGA
  • Publication number: 20170162486
    Abstract: A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 8, 2017
    Inventors: AKIHIRO KIMURA, TAKESHI SUNAGA, SHOUJI YASUNAGA, AKIHIRO KOGA
  • Patent number: 9653384
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: May 16, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga
  • Patent number: 9613927
    Abstract: A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: April 4, 2017
    Assignee: Rohm Co., Ltd.
    Inventors: Akihiro Kimura, Takeshi Sunaga, Shouji Yasunaga, Akihiro Koga
  • Publication number: 20160304745
    Abstract: There is provided a room-temperature-curable polyorganosiloxane composition having low viscosity and good coatability without any solvent and forming a cured coating film excellent in scratch resistance. The room-temperature-curable polyorganosiloxane composition contains: (A) 100 parts by mass of a mixture of (A1) 10 to 80 parts by mass of a polyorganosiloxane having two or more alkoxy groups bonded to silicon atoms and a prescribed viscosity, and (A2) 90 to 20 parts by mass of a polyorganosiloxane represented by an average composition formula: R1aSi(OR2)bO{4?(a+b)}/2 (R1 and R2 represent prescribed group respectively, and a and b are prescribed positive numbers), having an Mw of 2,000 to 100,000 and a three-dimensional network structure, and being in a solid state or in a semisolid state at normal temperature; and (B) 0.1 to 15 parts by mass of an organic titanium compound.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 20, 2016
    Applicant: MOMENTIVE PERFORMANCE MATERIALS JAPAN LLC
    Inventors: Isao IIDA, Takeshi SUNAGA
  • Publication number: 20160218052
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Application
    Filed: April 5, 2016
    Publication date: July 28, 2016
    Inventors: AKIHIRO KIMURA, TAKESHI SUNAGA
  • Patent number: 9331041
    Abstract: A semiconductor device includes a semiconductor chip, and a terminal connected with the semiconductor chip. The terminal has a first surface and a second surface spaced from each other in a thickness direction. The semiconductor device also includes a sealing resin covering the semiconductor chip and the terminal. The sealing resin is so configured that the first surface of the terminal is exposed from the sealing resin. The terminal is formed with an opening to be filled with the sealing resin.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: May 3, 2016
    Assignee: ROHM CO., LTD.
    Inventors: Takeshi Sunaga, Akihiro Kimura
  • Patent number: 9324677
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: April 26, 2016
    Assignee: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga
  • Publication number: 20150294952
    Abstract: A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed.
    Type: Application
    Filed: June 25, 2015
    Publication date: October 15, 2015
    Inventors: Akihiro KIMURA, TAKESHI SUNAGA, SHOUJI YASUNAGA, AKIHIRO KOGA
  • Patent number: 9093434
    Abstract: A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: July 28, 2015
    Assignee: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga, Shouji Yasunaga, Akihiro Koga
  • Publication number: 20140027891
    Abstract: A method includes the steps of: preparing a lead frame including a plurality of die pads, and preparing a plurality of semiconductor chips; disposing each of the semiconductor chips on a respective one of the die pads; forming a sealing resin to cover the die pads and the semiconductor chips; and attaching a heat dissipation plate to the die pads by pressing the heat dissipation plate against the die pads via a resin sheet which is an adhesive layer after the sealing resin is formed
    Type: Application
    Filed: April 3, 2012
    Publication date: January 30, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga, Shouji Yasunaga, Akihiro Koga
  • Publication number: 20140021627
    Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
    Type: Application
    Filed: April 2, 2012
    Publication date: January 23, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Akihiro Kimura, Takeshi Sunaga
  • Publication number: 20130320527
    Abstract: A semiconductor device includes a semiconductor chip, and a terminal connected with the semiconductor chip. The terminal has a first surface and a second surface spaced from each other in a thickness direction. The semiconductor device also includes a sealing resin covering the semiconductor chip and the terminal. The sealing resin is so configured that the first surface of the terminal is exposed from the sealing resin. The terminal is formed with an opening to be filled with the sealing resin.
    Type: Application
    Filed: August 7, 2013
    Publication date: December 5, 2013
    Applicant: Rohm Co., Ltd.
    Inventors: Takeshi SUNAGA, Akihiro KIMURA
  • Publication number: 20080311376
    Abstract: The present invention improves abrasion resistance and persistence of anti-fogging properties of an anti-fogging article. The anti-fogging article of the present invention includes an article, a porous film formed on the surface thereof, and a hydrophilic film formed thereon. The porous film contains inorganic fine particles and a binder. The binder covers at least a part of surfaces of the inorganic fine particles and is interposed between the inorganic fine particles. The binder contains a metal oxide as its main component and a hydrophilic organic group other than an alkoxyl group. The hydrophilic film contains a hydrophilic organic polymer.
    Type: Application
    Filed: July 29, 2005
    Publication date: December 18, 2008
    Applicant: NIPPON SHEET GLASS COMPANY LIMITED
    Inventors: Mizuho Matsuda, Kazutaka Kamitani, Takeshi Sunaga, Takeshi Yabuta
  • Patent number: 6329456
    Abstract: A coating resin composition is able to form a coating film having not only high hardness and weatherability but also high toughness, and can be cured both at room temperature and by heating curing, and further which is good at storage stability. The coating resin composition consists essentially of a silica-dispersed oligomer solution of organosilane prepared by partially hydrolyzing a hydrolyzable organosilane represented by a formula R1nSiX4−n, in colloidal silica dispersed in an organic solvent, water or a mixture thereof, and an acrylic resin which is a copolymer of acrylate or methacrylate represented by a formula, CH2═CR2(COOR3), and a curing catalyst. This composition is used by separating the components into two solutions and then mixing thereof as required. A resin-coated article comprises a cured resin layer of the coating resin composition on the surface of a substrate.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: December 11, 2001
    Assignees: Matsushita Electric Works, Ltd., Toshiba Silicone Co., Ltd.
    Inventors: Junko Okibe, Minoru Inoue, Motoaki Haruna, Ayumu Yasuda, Takeshi Sunaga, Yasuyo Iwabuchi, Norio Sato
  • Patent number: 6090873
    Abstract: A coating resin composition is able to form a coating film having not only high hardness and weatherability but also high toughness, and can be cured both at room temperature and by heating curing, and further which is good at storage stability.The coating resin composition consists essentially of a silica-dispersed oligomer solution of organosilane prepared by partially hydrolyzing a hydrolyzable organosilane represented by a formula R.sup.1.sub.n SiX.sub.4-n, in colloidal silica dispersed in an organic solvent, water or a mixture thereof, and an acrylic resin which is a copolymer of acrylate or methacrylate represented by a formula, CH.sub.2 .dbd.CR.sup.2 (COOR.sup.3), and a curing catalyst. This composition is used by separating the components into two solutions and then mixing thereof as required. A resin-coated article comprises a cured resin layer of the coating resin composition on the surface of a substrate.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: July 18, 2000
    Assignees: Matsushita Electric Works, Ltd., Toshiba Silicone Co. Ltd.
    Inventors: Junko Okibe, Minoru Inoue, Motoaki Haruna, Ayumu Yasuda, Takeshi Sunaga, Yasuyo Iwabuchi, Norio Sato
  • Patent number: 5115069
    Abstract: A glycidoxy group-containing organosilicon compound represented by formula (I) ##STR1## wherein R which may be the same or different each represents an alkyl group, an aryl group, or an alkenyl group, and n is 0 or an integer of 1 to 1,000. The compound is useful for modification of interfacial properties of various synthetic resins such as epoxy resins, polyesters, polyurethanes, polyamides and polyimides.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: May 19, 1992
    Assignee: Toshiba Silicone Co., Ltd.
    Inventors: Hisao Motegi, Takeshi Sunaga, Michio Zenbayashi
  • Patent number: 5113000
    Abstract: An organosilicon compound represented by the general formula: ##STR1## where R.sup.1 represents a substituted or non-substituted monovalent hydrocarbon group, X represents a chloromethyl group, (meth)acryloxymethyl group, glycidoxymethyl group or aminomethyl group, Y represents a hydrolyzable group or hydroxyl group, n represents a number of 1, 2 or 3. The compound is useful, for example, for the improvement of adhesion between the organic and inorganic materials.
    Type: Grant
    Filed: December 5, 1990
    Date of Patent: May 12, 1992
    Assignee: Toshiba Silicone Co., Ltd.
    Inventors: Hisao Motegi, Takeshi Sunaga, Michio Zembayashi