Patents by Inventor Taketo Matsuda

Taketo Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10943852
    Abstract: According to some embodiments, a semiconductor device includes a semiconductor substrate, a metal portion, a first insulating film, and a second insulating film. The semiconductor substrate has a through-hole extending from a first surface of the semiconductor substrate to a second surface thereof opposite to the first surface. The metal portion is formed in the through-hole. The first insulating film is provided on the second surface of the semiconductor substrate and on a side surface of the through-hole. The second insulating film has a dielectric constant of not more than 6.5 and is provided on a metal portion-side surface of the first insulating film on the side surface of the through-hole of the semiconductor substrate.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Ippei Kume, Taketo Matsuda, Shinya Okuda, Masahiko Murano
  • Publication number: 20190363037
    Abstract: According to some embodiments, a semiconductor device includes a semiconductor substrate, a metal portion, a first insulating film, and a second insulating film. The semiconductor substrate has a through-hole extending from a first surface of the semiconductor substrate to a second surface thereof opposite to the first surface. The metal portion is formed in the through-hole. The first insulating film is provided on the second surface of the semiconductor substrate and on a side surface of the through-hole. The second insulating film has a dielectric constant of not more than 6.5 and is provided on a metal portion-side surface of the first insulating film on the side surface of the through-hole of the semiconductor substrate.
    Type: Application
    Filed: February 26, 2019
    Publication date: November 28, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Ippei Kume, Taketo Matsuda, Shinya Okuda, Masahiko Murano
  • Patent number: 10153227
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite the first surface, a through via extending through the semiconductor substrate from the first surface to the second surface, a metal layer adjacent an inside surface of the through via, and an insulating film including OH bonds located between the semiconductor substrate and the metal layer, the insulating film having a thickness of 1 ?m or less.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: December 11, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Ippei Kume, Taketo Matsuda, Shinya Okuda, Masahiko Murano
  • Publication number: 20180286783
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite the first surface, a through via extending through the semiconductor substrate from the first surface to the second surface, a metal layer adjacent an inside surface of the through via, and an insulating film including OH bonds located between the semiconductor substrate and the metal layer, the insulating film having a thickness of 1 ?m or less.
    Type: Application
    Filed: September 4, 2017
    Publication date: October 4, 2018
    Inventors: Ippei KUME, Taketo MATSUDA, Shinya OKUDA, Masahiko MURANO
  • Patent number: 7651922
    Abstract: A method for fabricating a semiconductor device, includes forming a silicon nitride film on a base body, forming a silicon film on said silicon nitride film, forming at least one groove extending from said silicon film to inside of said base body, forming by high-density plasma-enhanced chemical vapor deposition a silicon-containing dielectric film in said groove and on said silicon film in such a way that a silicon-rich layer is formed at a height position spaced apart from said base body within said groove, said silicon-rich layer being higher in silicon content than remaining silicon-containing dielectric film, removing by etching a portion of said silicon-containing dielectric film above said silicon film and a portion of said remaining silicon-containing dielectric film above said silicon-rich layer, if any, and after having removed said silicon-containing dielectric film, removing by etching said silicon-rich layer and said silicon film.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: January 26, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Taketo Matsuda
  • Patent number: 7446061
    Abstract: A semiconductor substrate with a groove is placed in a plasma generating reaction chamber. Silicon, oxygen and hydrogen containing gases are introduced into the reaction chamber as process gases. A ratio of a gas flow of the hydrogen containing gas except the silicon containing gas to a total gas flow of the silicon containing gas and the oxygen containing gas defines a first gas-flow ratio. A ratio of a gas flow of the oxygen containing gas to that of the silicon containing gas defines a second gas-flow ratio. The first and second gas-flow ratios establish a linear function for a critical condition. A cluster formation condition is set up by relatively increasing the first gas-flow ratio while relatively decreasing the second gas-flow ratio with respect to the critical condition. A cluster suppression condition is also set up by relatively decreasing the first gas-flow ratio while relatively increasing the second gas-flow ratio with respect to the critical condition.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: November 4, 2008
    Assignee: Kabushiki Kaihsa Toshiba
    Inventors: Hiroshi Sato, Rempei Nakata, Yukio Nishiyama, Taketo Matsuda
  • Publication number: 20080206956
    Abstract: A method for fabricating a semiconductor device, includes forming a silicon nitride film on a base body, forming a silicon film on said silicon nitride film, forming at least one groove extending from said silicon film to inside of said base body, forming by high-density plasma-enhanced chemical vapor deposition a silicon-containing dielectric film in said groove and on said silicon film in such a way that a silicon-rich layer is formed at a height position spaced apart from said base body within said groove, said silicon-rich layer being higher in silicon content than remaining silicon-containing dielectric film, removing by etching a portion of said silicon-containing dielectric film above said silicon film and a portion of said remaining silicon-containing dielectric film above said silicon-rich layer, if any, and after having removed said silicon-containing dielectric film, removing by etching said silicon-rich layer and said silicon film.
    Type: Application
    Filed: November 30, 2007
    Publication date: August 28, 2008
    Inventor: Taketo MATSUDA
  • Publication number: 20070128865
    Abstract: A semiconductor substrate with a groove is placed in a plasma generating reaction chamber. Silicon, oxygen and hydrogen containing gases are introduced into the reaction chamber as process gases. A ratio of a gas flow of the hydrogen containing gas except the silicon containing gas to a total gas flow of the silicon containing gas and the oxygen containing gas defines a first gas-flow ratio. A ratio of a gas flow of the oxygen containing gas to that of the silicon containing gas defines a second gas-flow ratio. The first and second gas-flow ratios establish a linear function for a critical condition. A cluster formation condition is set up by relatively increasing the first gas-flow ratio while relatively decreasing the second gas-flow ratio with respect to the critical condition. A cluster suppression condition is also set up by relatively decreasing the first gas-flow ratio while relatively increasing the second gas-flow ratio with respect to the critical condition.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 7, 2007
    Inventors: Hiroshi Sato, Rempei Nakata, Yukio Nishiyama, Taketo Matsuda