Abstract: A CCD type solid-state imaging device includes: a photoelectric conversion element (n layer 2, p layer 3) formed in a semiconductor substrate 1; a charge transfer channel 5 that transfers electric charges generated in the photoelectric conversion element; a charge read region 6 that reads out the electric charges accumulated in the photoelectric conversion element into the charge transfer channel 5; and a charge read electrode 8 formed above the charge read region 6 with a gate insulating film 10 disposed therebetween. The charge read electrode 8 controls the reading out of the electric charges into the charge transfer channel 5. A gap is formed between the photoelectric conversion element and the charge read electrode 8 in plan view.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: A CCD type solid-state imaging device includes: a photoelectric conversion element (n layer 2, p layer 3) formed in a semiconductor substrate 1; a charge transfer channel 5 that transfers electric charges generated in the photoelectric conversion element; a charge read region 6 that reads out the electric charges accumulated in the photoelectric conversion element into the charge transfer channel 5; and a charge read electrode 8 formed above the charge read region 6 with a gate insulating film 10 disposed therebetween. The charge read electrode 8 controls the reading out of the electric charges into the charge transfer channel 5. A gap is formed between the photoelectric conversion element and the charge read electrode 8 in plan view.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: A semiconductor device has: a main circuit including a plurality of MOS transistors operating at a first voltage; a memory requiring an operation at a second voltage higher than the first voltage; and a drive circuit for driving the memory, the drive circuit comprising one well, two or more MOS transistors in a cascade connection formed in the well, and well contact or contacts formed between MOS transistors in the well and on both outer sides of the cascade connection, or formed only between MOS transistors, or formed on both outer sides of the cascade connection, or formed only outside a drain of MOS transistors in the cascade connection. The semiconductor device is provided which integrates a memory requiring a high voltage, can simplify manufacture processes for a memory drive circuit and suppress an increase in an occupation area in chip of the memory drive circuit.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: A semiconductor device has: a main circuit including a plurality of MOS transistors operating at a first voltage; a memory requiring an operation at a second voltage higher than the first voltage; and a drive circuit for driving the memory, the drive circuit comprising one well, two or more MOS transistors in a cascade connection formed in the well, and well contact or contacts formed between MOS transistors in the well and on both outer sides of the cascade connection, or formed only between MOS transistors, or formed on both outer sides of the cascade connection, or formed only outside a drain of MOS transistors in the cascade connection. The semiconductor device is provided which integrates a memory requiring a high voltage, can simplify manufacture processes for a memory drive circuit and suppress an increase in an occupation area in chip of the memory drive circuit.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: A semiconductor device includes a semiconductor substrate. A gate electrode is formed on the semiconductor substrate via a gate insulating film. A source region and a drain region of a first conductivity type are formed on the first side and the second side of the gate electrode, respectively, in the semiconductor substrate. A punch-through stopper region of a second conductivity type is formed in the semiconductor substrate such that the second conductivity type punch-through stopper region is located between the source region and the drain region at distances from the source region and the drain region and extends in the direction perpendicular to the principal surface of the semiconductor substrate. The concentration of an impurity element of the second conductivity type in the punch-through stopper region is set to be at least five times the substrate impurity concentration between the source region and the drain region.

Abstract: The nonvolatile semiconductor memory device comprises a semiconductor substrate 10 with a trench 16 formed in the surface thereof, an impurity diffused region 24 formed in the surface of the semiconductor substrate 10 other than the region where the trench 16 is formed, an impurity diffused region 26 formed in the semiconductor substrate 10 at the bottom of the trench 16 and having a width smaller than that of the trench 16, a charge storage layer 28 of an insulating layer formed on the inside surface of the trench 16, and a conducting layer 36 formed on the charge storage layer 28 between the impurity diffused region 24 and the impurity diffused region 26. Whereby the punch-through between the impurity diffused region 24 and the impurity diffused region 26 can be effectively prevented, and resultantly writing can be efficiently performed.