Abstract: An object is to provide a technique capable of reducing stress in the entire semiconductor device. The semiconductor device includes a plurality of sub-modules including a first sealing member, an insulating substrate provided with a first circuit pattern electrically connected to at least one of the conductive plates of the plurality of sub-modules, connection members electrically connected to at least one of the conductive pieces of the plurality of sub-modules, and a second sealing member having lower hardness than the first sealing member, which seals the plurality of sub-modules, the insulating substrate, and the connection members.

Abstract: Even if there is a change in the shape of a transfer mold power module is required, a change in a position of the electrode of the module is facilitated by separating electrode terminals of a power module from the electrodes and retrofitting the separated electrode terminals to the electrodes with high precision. A semiconductor device includes a mold resin enclosing a semiconductor chip, an electrode electrically connected to the semiconductor chip and exposed in an opening provided in the mold resin, and an electrode terminal having a contact portion that covers the electrode and is in electrical contact with the electrode, a plurality of projections formed to surround the contact portion and provided between a side surface of the opening and the contact portion, a contact end portion having the contact portion and an open end portion which is a different end portion from the contact end portion.

Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.

Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.

Abstract: A first principal electrode and a first control electrode pad are formed on a first principal surface of the semiconductor chip. A second principal electrode and a second control electrode pad are formed on a second principal surface of the semiconductor chip. The second principal electrode and the second control electrode pad are respectively bonded to first and second metal patterns of an insulating substrate. Bonding sections of first and second wires overlap a bonding section of the second principal electrode or the second control electrode pad in plan view. Thickness of the first and second metal patterns is 0.2 mm or less.

Abstract: A first lead terminal, a second lead terminal provided parallel to the first lead terminal, and a tie bar connecting the first lead terminal and the second lead terminal are provided. The tie bar includes a first narrow-width section touching the first lead terminal, a second narrow-width section touching the second lead terminal, and a wide-width section having a larger width than the first narrow-width section and the second narrow-width section and connecting the first narrow-width section and the second narrow-width section. The wide-width section has a through-hole formed between the first narrow-width section and the second narrow-width section.

Abstract: A lead frame (4) includes an inner lead (5), an outer lead (2) connected to the inner lead (5), and a power die pad (7). A power semiconductor device (9) is bonded onto the power die pad (7). A first metal thin line (11) electrically connects the inner lead (5) and the power semiconductor device (9). Sealing resin (1) seals the inner lead (5), the power die pad (7), the power semiconductor device (9), and the first metal thin line (11). The sealing resin (1) includes an insulating section (15) directly beneath the power die pad (7). A thickness of the insulating section (15) is 1 to 4 times a maximum particle diameter of inorganic particles in the sealing resin (1). A first hollow (14) is provided on an upper surface of the sealing resin (1) directly above the power die pad (7) in a region without the first metal thin line (11) and the power semiconductor device (9).

Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.

Abstract: A first lead terminal, a second lead terminal provided parallel to the first lead terminal, and a tie bar connecting the first lead terminal and the second lead terminal are provided. The tie bar includes a first narrow-width section touching the first lead terminal, a second narrow-width section touching the second lead terminal, and a wide-width section having a larger width than the first narrow-width section and the second narrow-width section and connecting the first narrow-width section and the second narrow-width section. The wide-width section has a through-hole formed between the first narrow-width section and the second narrow-width section.

Abstract: A first lead terminal, a second lead terminal provided parallel to the first lead terminal, and a tie bar connecting the first lead terminal and the second lead terminal are provided. The tie bar includes a first narrow-width section touching the first lead terminal, a second narrow-width section touching the second lead terminal, and a wide-width section having a larger width than the first narrow-width section and the second narrow-width section and connecting the first narrow-width section and the second narrow-width section. The wide-width section has a through-hole formed between the first narrow-width section and the second narrow-width section.

Abstract: A lead frame (4) includes an inner lead (5), an outer lead (2) connected to the inner lead (5), and a power die pad (7). A power semiconductor device (9) is bonded onto the power die pad (7). A first metal thin line (11) electrically connects the inner lead (5) and the power semiconductor device (9). Sealing resin (1) seals the inner lead (5), the power die pad (7), the power semiconductor device (9), and the first metal thin line (11). The sealing resin (1) includes an insulating section (15) directly beneath the power die pad (7). A thickness of the insulating section (15) is 1 to 4 times a maximum particle diameter of inorganic particles in the sealing resin (1). A first hollow (14) is provided on an upper surface of the sealing resin (1) directly above the power die pad (7) in a region without the first metal thin line (11) and the power semiconductor device (9).

Abstract: A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

Abstract: A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.

Abstract: A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.

Abstract: A power semiconductor element is fixed on a die pad of the lead frame. A metal plate is bonded to a lower surface of the die pad via an insulating film. The inner lead etc. are disposed in a cavity between a lower mold and an upper mold and are encapsulated with an encapsulation resin. The lower mold has a stepped portion provided in a bottom surface of the cavity below the inner lead. A height of an upper surface of the stepped portion is larger than a height of an upper surface of the power semiconductor element disposed in the cavity. When an encapsulation resin is injected into the cavity, a lower surface of the metal plate is in contact with the bottom surface of the cavity, and the encapsulation resin flows downward from above the stepped portion toward the upper surface of the power semiconductor element.

Abstract: A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, semiconductor elements bonded on the circuit pattern with a brazing material, and a wiring terminal bonded with a brazing material on an electrode provided on each of the semiconductor elements on an opposite side of the circuit pattern, in which a part of the wiring terminal is in contact with the insulating substrate, and insulated from the circuit pattern.

Abstract: A first lead terminal, a second lead terminal provided parallel to the first lead terminal, and a tie bar connecting the first lead terminal and the second lead terminal are provided. The tie bar includes a first narrow-width section touching the first lead terminal, a second narrow-width section touching the second lead terminal, and a wide-width section having a larger width than the first narrow-width section and the second narrow-width section and connecting the first narrow-width section and the second narrow-width section. The wide-width section has a through-hole formed between the first narrow-width section and the second narrow-width section.

Abstract: An object is to provide a technique in which a cost reduction in a power semiconductor device can be achieved while maintaining heat dissipation performance as much as possible. A power semiconductor device includes a leadframe, a power semiconductor element disposed on an upper surface of the leadframe, and an insulating layer disposed on a lower surface of the leadframe. At least a partial line of a peripheral line of a region where the insulating layer is disposed, on the lower surface, is aligned, in top view, with at least a partial line of an expanded peripheral line obtained by shifting outwardly, by the amount corresponding to the thickness of the leadframe, the peripheral line of the region where the power semiconductor element is disposed, on the upper surface.

Abstract: A power semiconductor element is fixed on a die pad of the lead frame. A metal plate is bonded to a lower surface of the die pad via an insulating film. The inner lead etc. are disposed in a cavity between a lower mold and an upper mold and are encapsulated with an encapsulation resin. The lower mold has a stepped portion provided in a bottom surface of the cavity below the inner lead. A height of an upper surface of the stepped portion is larger than a height of an upper surface of the power semiconductor element disposed in the cavity. When an encapsulation resin is injected into the cavity, a lower surface of the metal plate is in contact with the bottom surface of the cavity, and the encapsulation resin flows downward from above the stepped portion toward the upper surface of the power semiconductor element.

Abstract: A semiconductor device incorporating a heat spreader and improved to inhibit dielectric breakdown is provided. The semiconductor device has an electrically conductive heat spreader having a bottom surface, a sheet member having a front surface and a back surface electrically insulated from each other, IGBTs and diodes fixed on the heat spreader and electrically connected thereto, and a molding resin. The front surface contacts with the bottom surface and has a peripheral portion jutting out from edges thereof. The molding resin encapsulates the front surface of the sheet member, the heat spreader and the semiconductor elements. At least part of the back surface of the sheet member is exposed out of the molding resin. The heat spreader has, at a corner of its bottom surface, corner portions having a beveled shape or a curved-surface shape as seen in plan and having a rectangular shape as seen in section.