Abstract: Provided is a PIN diode that can suppress thermal destruction from occurring at the time of a reverse bias exceeding a breakdown voltage by current concentration on a curved part of an anode region. The PIN diode is configured to have: a semiconductor substrate 11 that includes an N+ semiconductor layer 1 and an N? semiconductor layer 2; a cathode electrode 18 that is formed on an outer surface of the N+ semiconductor layer 1; a main anode region 16, a separated anode region 15, and an anode connecting region that are formed by selectively diffusing P-type impurities from an outer surface of the N? semiconductor layer 2; and an anode electrode 17 that is formed on the main anode region 16.

Abstract: A PIN diode having improved avalanche resistance is provided. The PIN diode includes: a semiconductor substrate 11 that includes an N+ semiconductor layer 1, and an N? semiconductor layer 2; a P-type anode region 15 that is formed by selective impurity diffusion into an outer surface of the N? semiconductor layer 2; and an anode electrode 17 that is conducted to the anode region 15 through a contact region 17c in the anode region 15. The anode region 15 has a substantially rectangular outer edge of which four sides are adapted to be linear parts B2 and four vertices are adapted to be curved parts B1, and outside the contact region 17c, N-type non-diffusion corner regions 16 that extend along the curved parts B1 are respectively formed.

Abstract: Provided is a PIN diode that can suppress thermal destruction from occurring at the time of a reverse bias exceeding a breakdown voltage by current concentration on a curved part of an anode region. The PIN diode is configured to have: a semiconductor substrate 11 that includes an N+ semiconductor layer 1 and an N? semiconductor layer 2; a cathode electrode 18 that is formed on an outer surface of the N+ semiconductor layer 1; a main anode region 16, a separated anode region 15, and an anode connecting region that are formed by selectively diffusing P-type impurities from an outer surface of the N? semiconductor layer 2; and an anode electrode 17 that is formed on the main anode region 16.

Abstract: A PIN diode having improved avalanche resistance is provided. The PIN diode includes: a semiconductor substrate 11 that includes an N+ semiconductor layer 1, and an N? semiconductor layer 2; a P-type anode region 15 that is formed by selective impurity diffusion into an outer surface of the N? semiconductor layer 2; and an anode electrode 17 that is conducted to the anode region 15 through a contact region 17c in the anode region 15. The anode region 15 has a substantially rectangular outer edge of which four sides are adapted to be linear parts B2 and four vertices are adapted to be curved parts B1, and outside the contact region 17c, N-type non-diffusion corner regions 16 that extend along the curved parts B1 are respectively formed.