Patents by Inventor Taku ISHIDA

Taku ISHIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8477124
    Abstract: A semiconductor device has an LCD driver formed over a silicon substrate. The LCD driver is arranged in a source output circuit region and includes two or more source output cells for generating data signals and two or more output pads for receiving the data signals and sending them to the outside. The two or more pads are arranged over the silicon substrate along a row direction, and the two or more source output cells are arranged in two rows and N columns along the row direction. A source output cell arranged at an Nth column of a first row is electrically coupled to a (2N?1)th output pad. Also, a source output cell CS1 arranged at the Nth column of a second row is electrically coupled to a (2N)th output pad. The arrangement allows for a reduced chip size.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: July 2, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Taku Ishida, Kazuhisa Higuchi, Shinobu Notomi
  • Publication number: 20110148827
    Abstract: A semiconductor device has an LCD driver formed over a silicon substrate. The LCD driver is arranged in a source output circuit region and includes two or more source output cells for generating data signals and two or more output pads for receiving the data signals and sending them to the outside. The two or more pads are arranged over the silicon substrate along a row direction, and the two or more source output cells are arranged in two rows and N columns along the row direction. A source output cell arranged at an Nth column of a first row is electrically coupled to a (2N?1)th output pad. Also, a source output cell CS1 arranged at the Nth column of a second row is electrically coupled to a (2N)th output pad. The arrangement allows for a reduced chip size.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 23, 2011
    Inventors: Taku ISHIDA, Kazuhisa Higuchi, Shinobu Notomi