Abstract: A MEMS device is provided that includes a piezoelectric film, a first electrode and a second electrode sandwiching the piezoelectric film, a protective film that covers at least part of the second electrode and having a cavity that opens part of the second electrode, a third electrode that contacts the second electrode at least in the cavity and is provided so as to cover at least part of the protective film, and a first wiring layer having a first contact portion in contact with the third electrode.

Abstract: A method of manufacturing a collective substrate that includes: forming at least one first mark in or on a first main surface of a first substrate; joining the first main surface of the first substrate and a first main surface of a second substrate to each other; forming an opening in the second substrate such that the first mark is exposed therein; and forming a device portion in or on a second main surface of the second substrate while using the first mark as a reference.

Abstract: A resonator including a lower electrode, an upper electrode, and a piezoelectric film that is formed between the lower electrode and the upper electrode. A MEMS device is provided that includes an upper lid that faces the upper electrode, and a lower lid that faces the lower electrode and that seals the resonator together with the upper lid. A CMOS device is mounted on a surface of the upper lid or the lower lid opposite a surface that faces the resonator. The CMOS device includes a CMOS layer and a protective layer that is disposed on a surface of the CMOS layer opposite a surface that faces the resonator. The upper or lower lid to which the CMOS device is joined includes a through-electrode that electrically connects the CMOS device to the resonator.

Abstract: A MEMS device is provided that includes a piezoelectric film, a first electrode and a second electrode sandwiching the piezoelectric film, a protective film that covers at least part of the second electrode and having a cavity that opens part of the second electrode, a third electrode that contacts the second electrode at least in the cavity and is provided so as to cover at least part of the protective film, and a first wiring layer having a first contact portion in contact with the third electrode.

Abstract: A resonator including a lower electrode, an upper electrode, and a piezoelectric film that is formed between the lower electrode and the upper electrode. A MEMS device is provided that includes an upper lid that faces the upper electrode, and a lower lid that faces the lower electrode and that seals the resonator together with the upper lid. A CMOS device is mounted on a surface of the upper lid or the lower lid opposite a surface that faces the resonator. The CMOS device includes a CMOS layer and a protective layer that is disposed on a surface of the CMOS layer opposite a surface that faces the resonator. The upper or lower lid to which the CMOS device is joined includes a through-electrode that electrically connects the CMOS device to the resonator.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor substrate having a first wiring electrode on a first surface thereof, a first protective layer on the semiconductor substrate, having an opening therethrough at the location of first wiring electrode, a first bump electrode in the opening of the first protective layer, the first bump electrode including a base overlying the wiring electrode and an opposed bump receiving surface, and a first bump comprising a bump diameter of 30 ?m or less connected to the first bump electrode. The width of the base of the first bump electrode within the opening is equal to or less than 1.5 times the thickness of the first protective layer.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor substrate having a first wiring electrode on a first surface thereof, a first protective layer on the semiconductor substrate, having an opening therethrough at the location of first wiring electrode, a first bump electrode in the opening of the first protective layer, the first bump electrode including a base overlying the wiring electrode and an opposed bump receiving surface, and a first bump comprising a bump diameter of 30 ?m or less connected to the first bump electrode. The width of the base of the first bump electrode within the opening is equal to or less than 1.5 times the thickness of the first protective layer.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming through holes extending through a semiconductor substrate in a thickness direction to integrated circuits in chip areas, and forming a first mark opening and second mark openings in a dicing line. The method detects the first mark opening based on positions of the second mark openings. Then, the method performs alignment of exposure positions based on the position of the first mark opening to perform photolithography, thereby forming a resist pattern on the back side of the semiconductor substrate.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming through holes extending through a semiconductor substrate in a thickness direction to integrated circuits in chip areas, and forming a first mark opening and second mark openings in a dicing line. The method detects the first mark opening based on positions of the second mark openings. Then, the method performs alignment of exposure positions based on the position of the first mark opening to perform photolithography, thereby forming a resist pattern on the back side of the semiconductor substrate.

Abstract: In one embodiment, a semiconductor device includes a chip stacked body disposed on an interposer substrate and an interface chip mounted on the chip stacked body. The chip stacked body has plural semiconductor chips, and is electrically connected via through electrodes provided in the semiconductor chips excluding a lowermost semiconductor chip in a stacking order of the plural semiconductor chips and bump electrodes. The interface chip is electrically connected to the interposer substrate via a rewiring layer formed on a surface of an uppermost semiconductor chip in the stacking order or through electrodes provided in the interface chip.

Abstract: In one embodiment, a semiconductor device includes a chip stacked body disposed on an interposer substrate and an interface chip mounted on the chip stacked body. The chip stacked body has plural semiconductor chips, and is electrically connected via through electrodes provided in the semiconductor chips excluding a lowermost semiconductor chip in a stacking order of the plural semiconductor chips and bump electrodes. The interface chip is electrically connected to the interposer substrate via a rewiring layer formed on a surface of an uppermost semiconductor chip in the stacking order or through electrodes provided in the interface chip.

Abstract: In one embodiment, a separation layer and a wiring layer are formed in order on a supporting substrate. A plurality of semiconductor chips are mounted on the wiring layer. The plural semiconductor chips are collectively sealed by a sealing resin layer. A resin-sealed body is evenly held by a holder. The resin-sealed body is separated from the supporting substrate by shearing the separation layer while being heated. The separated resin-sealed body is cooled while a state of the resin-sealed body being held evenly by the holder is maintained, and then a holding state of the resin-sealed body by the holder is released. The resin-sealed body is cut to singulate a circuit structure body.

Abstract: In a semiconductor device manufacturing method, a first resin layer with optical transmission restrained is formed on a supporting substrate and a second resin layer made of thermoplastic resin is formed on the first resin layer. An insulating layer and a wiring layer are formed on the second resin layer and a first semiconductor chip is mounted on the wiring layer. The supporting substrate is separated by irradiating the first resin layer with a laser beam, and the second resin layer is removed.

Abstract: In one embodiment, a separation layer and a wiring layer are formed in order on a supporting substrate. A plurality of semiconductor chips are mounted on the wiring layer. The plural semiconductor chips are collectively sealed by a sealing resin layer. A resin-sealed body is evenly held by a holder. The resin-sealed body is separated from the supporting substrate by shearing the separation layer while being heated. The separated resin-sealed body is cooled while a state of the resin-sealed body being held evenly by the holder is maintained, and then a holding state of the resin-sealed body by the holder is released. The resin-sealed body is cut to singulate a circuit structure body.

Abstract: According to one embodiment, a resin supply device is configured to supply granular resins to a resin mold device including a first mold provided with a cavity and a second mold mated to the first mold. The resin supply device includes a first mechanism and a second mechanism. The first mechanism is configured to juxtapose multiple granular resins on an adsorption surface by adsorbing the multiple granular resins on the adsorption surface larger than the granular resins, and form an adsorbed resin body with a uniform thickness. The adsorbed resin body is made of the adsorbed multiple granular resins on the adsorption surface. The second mechanism is configured to drop the multiple granular resins adsorbed on the adsorption surface into the cavity by adsorption-release of the adsorption surface.

Abstract: According to an embodiment, a separation layer and a wiring layer having an organic insulating film formed of a resin material and a metal wiring are sequentially formed on a support substrate. Regions of the organic insulating film corresponding to dicing regions are removed. Plural semiconductor chips are mounted on the wiring layer. A sealing resin layer is formed on the separation layer. The sealing resin layer is formed to cover edge surfaces of the device forming regions. The support substrate is separated from a resin sealing body having the wiring layer, the plural semiconductor chips and the sealing resin layer. The resin sealing body is cut according to the dicing regions to cingulate a structure configuring a semiconductor device.