Patents by Inventor Taku Ohneda

Taku Ohneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7600140
    Abstract: A logic circuit system with power consumption that is reduced by automatically varying the clock frequency and operating voltage according to processing capability imposed on programmable logic circuits. The programmable logic circuits are capable of achieving plural circuit functions dynamically and can change realized circuit functions during operation. In addition, the system has a voltage supply portion for supplying a voltage to the programmable logic circuits, a clock signal supply portion for supplying a clock signal to the programmable logic circuits, a change control portion for changing the circuit functions realized by the programmable logic circuits to any one of the circuit functions, an operation time measuring portion for measuring the operation times of the programmable logic circuits to perform processing to achieve the circuit functions, respectively, and a clock-and-voltage determination portion for determining the frequency of the clock signal and the voltage, using the operation times.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: October 6, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto
  • Patent number: 7533282
    Abstract: A logic circuit apparatus includes a plurality of programmable logic circuits, a circuit data memory, a control unit. The plurality of programmable logic circuits are each configured to have a changeable circuit component based on circuit data. Each programmable logic circuit has a different processing performance. The circuit data memory is used to store a plurality of circuit data and performance requirements for the circuit data. The control unit is configured to selectively assign the plurality of circuit data to the plurality of programmable logic circuits so that a total power of all programmable logic circuits minimizes on condition that the performance requirement of the circuit data assigned to each programmable logic circuit is within the processing performance of each programmable logic circuit.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: May 12, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto, Riku Ogawa
  • Patent number: 7461279
    Abstract: A logic circuit system, having a programmable logic circuit including a circuit configuration including a first set of plural unit circuits and that is reconfigurable during operation, a circuit configuration information supplier configured to supply circuit configuration information about a second set of plural unit circuits to said programmable logic circuit, a change controller configured to change the circuit configuration of said programmable logic circuit from said first set of said plural unit circuits to said second set of said plural unit circuits based on said circuit configuration information, an operation time measurer configured to measure operation times of said first and second set of plural unit circuits, and a clock-and-voltage supplier configured to use said measured operation times to change from a first frequency and voltage value corresponding to said first set to a second frequency and voltage value corresponding to said second set, and to supply a clock signal having said second frequen
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: December 2, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto
  • Patent number: 7434074
    Abstract: A logic circuit system with power consumption that is reduced by automatically varying the clock frequency and operating voltage according to processing capability imposed on programmable logic circuits. The programmable logic circuits are capable of achieving plural circuit functions dynamically and can change realized circuit functions during operation. In addition, the system has a voltage supply portion for supplying a voltage to the programmable logic circuits, a clock signal supply portion for supplying a clock signal to the programmable logic circuits, a change control portion for changing the circuit functions realized by the programmable logic circuits to any one of the circuit functions, an operation time measuring portion for measuring the operation times of the programmable logic circuits to perform processing to achieve the circuit functions, respectively, and a clock-and-voltage determination portion for determining the frequency of the clock signal and the voltage, using the operation times.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: October 7, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto
  • Patent number: 7386741
    Abstract: Programmable logic circuits are changeable circuit components based on circuit data. A circuit data memory stores a plurality of circuit data and performance requirements. A feature data memory stores feature data of each programmable logic circuit. A control unit calculates a minimum voltage of the plurality of programmable logic circuits to execute the plurality of circuit data based on the performance requirements, and selectively assigns the plurality of circuit data to the plurality of programmable logic circuits so that the performance requirement of circuit data assigned to each programmable logic circuit is within the operation range of the programmable logic circuit at the minimum voltage. A supply unit supplies the minimum voltage to the plurality of programmable logic circuits.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto, Riku Ogawa
  • Patent number: 7330985
    Abstract: A logic circuit system with power consumption that is reduced by automatically varying the clock frequency and operating voltage according to processing capability imposed on programmable logic circuits. The programmable logic circuits are capable of achieving plural circuit functions dynamically and can change realized circuit functions during operation. In addition, the system has a voltage supply portion for supplying a voltage to the programmable logic circuits, a clock signal supply portion for supplying a clock signal to the programmable logic circuits, a change control portion for changing the circuit functions realized by the programmable logic circuits to any one of the circuit functions, an operation time measuring portion for measuring the operation times of the programmable logic circuits to perform processing to achieve the circuit functions, respectively, and a clock-and-voltage determination portion for determining the frequency of the clock signal and the voltage, using the operation times.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: February 12, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto
  • Publication number: 20070268040
    Abstract: A logic circuit system, having a programmable logic circuit including a circuit configuration including a first set of plural unit circuits and that is reconfigurable during operation, a circuit configuration information supplier configured to supply circuit configuration information about a second set of plural unit circuits to said programmable logic circuit, a change controller configured to change the circuit configuration of said programmable logic circuit from said first set of said plural unit circuits to said second set of said plural unit circuits based on said circuit configuration information, an operation time measurer configured to measure operation times of said first and second set of plural unit circuits, and a clock-and-voltage supplier configured to use said measured operation times to change from a first frequency and voltage value corresponding to said first set to a second frequency and voltage value corresponding to said second set, and to supply a clock signal having said second frequen
    Type: Application
    Filed: July 31, 2007
    Publication date: November 22, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taku OHNEDA, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto
  • Patent number: 7173451
    Abstract: A programmable logic circuit apparatus includes a programmable logic circuit that dynamically switches and operates a plurality of circuit blocks. The circuit blocks include a branch circuit block that performs branch processing and a plurality of child circuit blocks that selectively perform a plurality of kinds of processing on data obtained by the branch circuit block. The apparatus also includes a storage unit that stores data obtained by the branch circuit block and an identifier of a child circuit block into which the data is input. The identifier is associated with the data. The apparatus also includes a controller that causes the programmable logic circuit to process data associated with the same identifier as an identifier of a child circuit block being in operation in the programmable logic circuit, among the data stored in the storage unit, in preference to data associated with identifiers of other child circuit blocks.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: February 6, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Kanno, Masaya Tarui, Taku Ohneda, Riku Ogawa
  • Publication number: 20060017459
    Abstract: A programmable logic circuit apparatus includes a programmable logic circuit that dynamically switches and operates a plurality of circuit blocks. The circuit blocks include a branch circuit block that performs branch processing and a plurality of child circuit blocks that selectively perform a plurality of kinds of processing on data obtained by the branch circuit block. The apparatus also includes a storage unit that stores data obtained by the branch circuit block and an identifier of a child circuit block into which the data is input. The identifier is associated with the data. The apparatus also includes a controller that causes the programmable logic circuit to process data associated with the same identifier as an identifier of a child circuit block being in operation in the programmable logic circuit, among the data stored in the storage unit, in preference to data associated with identifiers of other child circuit blocks.
    Type: Application
    Filed: March 17, 2005
    Publication date: January 26, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Kanno, Masaya Tarui, Taku Ohneda, Riku Ogawa
  • Publication number: 20050268125
    Abstract: Programmable logic circuits are changeable circuit components based on circuit data. A circuit data memory stores a plurality of circuit data and performance requirements. A feature data memory stores feature data of each programmable logic circuit. A control unit calculates a minimum voltage of the plurality of programmable logic circuits to execute the plurality of circuit data based on the performance requirements, and selectively assigns the plurality of circuit data to the plurality of programmable logic circuits so that the performance requirement of circuit data assigned to each programmable logic circuit is within the operation range of the programmable logic circuit at the minimum voltage. A supply unit supplies the minimum voltage to the plurality of programmable logic circuits.
    Type: Application
    Filed: May 13, 2005
    Publication date: December 1, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taku Ohneda, Shinichi Kanno, Masaya Tarui, Yukimasa Miyamoto, Riku Ogawa