Patents by Inventor Takuji Kawamoto

Takuji Kawamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8688633
    Abstract: A player (content searching device) compares an acquired piece primary metadata (with running number 100) to a corresponding piece of primary metadata having number 100 in a memory unit. When no matching occurs, primary metadata with running number 99 is used. Then, this acquired primary metadata is compared to the piece of primary metadata having number 100 in the memory unit. When matching occurs, the player acquires content corresponding to running number 99 from a server and begins playback.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: April 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Takuji Kawamoto, Yoshiaki Iwata
  • Patent number: 8392932
    Abstract: An information processing device for causing a processor to execute a plurality of threads by switching between them. Each thread performs a process in correspondence with an obtainment of an event. The information processing device, when causing a second thread to transit from a non-execution state to an execution state to replace a first thread, detects whether or not, in the first thread having transited to the non-execution state, a next start position of a process belongs to an already processed part, detects whether or not a start position of a process in the second thread in the execution state belongs to the processed part; and determines whether or not to set a context for execution of the second thread into the processor in accordance with detection results of the first and second detection units, and performs processing in accordance with the determination.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: March 5, 2013
    Assignee: Panasonic Corporation
    Inventor: Takuji Kawamoto
  • Publication number: 20120209806
    Abstract: A player (content searching device) compares an acquired piece primary metadata (with running number 100) to a corresponding piece of primary metadata having number 100 in a memory unit. When no matching occurs, primary metadata with running number 99 is used. Then, this acquired primary metadata is compared to the piece of primary metadata having number 100 in the memory unit. When matching occurs, the player acquires content corresponding to running number 99 from a server and begins playback.
    Type: Application
    Filed: August 10, 2011
    Publication date: August 16, 2012
    Applicant: Panasonic Corporation
    Inventors: Takuji Kawamoto, Yoshiaki Iwata
  • Publication number: 20110067034
    Abstract: An information processing device for causing a processor to execute a plurality of threads by switching between them. Each thread performs a process in correspondence with an obtainment of an event. The information processing device, when causing a second thread to transit from a non-execution state to an execution state to replace a first thread, detects whether or not, in the first thread having transited to the non-execution state, a next start position of a process belongs to an already processed part, detects whether or not a start position of a process in the second thread in the execution state belongs to the processed part; and determines whether or not to set a context for execution of the second thread into the processor in accordance with detection results of the first and second detection units, and performs processing in accordance with the determination.
    Type: Application
    Filed: May 13, 2009
    Publication date: March 17, 2011
    Inventor: Takuji Kawamoto
  • Patent number: 7865169
    Abstract: Provided is a telecommunication apparatus and a telecommunication method accomplishing a one-to-many, many-to-one, and many-to-many simultaneous accesses in a power line telecommunication of a code division multiple access (CDMA) by using an AC power line (including the ground).
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: January 4, 2011
    Assignees: Ibeden company, Ltd., Shonan Institute of Technology, Hideaki Okazaki
    Inventors: Hideaki Okazaki, Takuji Kawamoto
  • Patent number: 7624387
    Abstract: A complier, program product, compilation device, communication terminal device and compilation method that enables parts of a source program having a large number of executions, or parts having a high possibility of a large number of executions, to be extracted with good precision and compiled preferentially. A loop having a multi-nested structure or a single-nested structure is searched for in a main program, and another program that is being called from within this loop is detected. Additionally, a loop having a multi-nested structure or a single-nested structure is searched for in the callee program, and the total number of nests in the loops detected so far is calculated as the loop depth. In other words, the degree of multiplicity in all of the loops forming a multi-nested structure over programs having a calling relationship is calculated as the loop depth.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: November 24, 2009
    Assignee: Panasonic Corporation
    Inventors: Takehiro Yoshida, Takuji Kawamoto
  • Patent number: 7590976
    Abstract: The present invention relates a compiler program, a computer-readable storage medium storing such a compiler program, a compiling method and a compiling unit, and an object thereof is to automatically generate a reentrant object program. In order to accomplish this object, an address saving program generator 16a generates an address saving program for saving a data area address of a calling program module; an address setting program generator 16b generates an address setting program for setting a data area address of an other program module; a transferring program generator 16c generates a transferring program for the transfer from the calling program module to the other program module; an address resetting program generator 16d generates an address resetting program for reading and resetting the saved data area address; and an accessing program generator 16e generates an accessing program for accessing a data area for the other program module using a relative address from the set data area address.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: September 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaki Kawai, Takuji Kawamoto, Shusuke Haruna, Yutaka Fujihara
  • Patent number: 7571436
    Abstract: The speed of execution of linked programs is improved to the extent possible within the limit of the capacity of memory storing linked programs. As initial settings, all class libraries are set for linking. By this means, all class libraries are linked. Then, a judgment is made as to whether there is overflow of memory storing linked programs. If there is overflow, the maximum value of the number of applications using currently linked class libraries is set in variable N. Then, settings are modified such that class libraries used by N or more applications are not linked, and linking is again performed. If memory overflow does not occur, processing ends.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: August 4, 2009
    Assignee: Panasonic Corporation
    Inventors: Takehiro Yoshida, Takuji Kawamoto, Masaki Kawai
  • Publication number: 20080107134
    Abstract: Provided is a telecommunication apparatus and a telecommunication method accomplishing a one-to-many, many-to-one, and many-to-many simultaneous accesses in a power line telecommunication of a code division multiple access (CDMA) by using an AC power line (including the ground). A comprisal includes an external power line model 1, a power distribution board 2 and an indoor power line model 3 which is connected to a power line by way of a capacitor for shutting off a sine wave of a power signal of a low frequency; a terminal station 5 and a base station 4 perform a power line telecommunication by way of a plug outlet; and the terminal station 5 controls and manages electric appliances installed in the indoor power line model 3.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 8, 2008
    Inventors: Hideaki Okazaki, Takuji Kawamoto
  • Publication number: 20070277177
    Abstract: An object of the invention is to control the priorities of threads so that the respective threads optimize the information amount stored in a storage in an autonomous distributed manner, and to optimize the processing load of the entirety of a processing system without control overhead. The storage stores information therein. The CPU executes a thread including a writing operation of writing information into the storage, and a reading operation of reading the information from the storage. The CPU controls a priority of the thread based on an information amount stored in the storage in at least one of conditions when the writing operation has been executed, and when the reading operation has been executed.
    Type: Application
    Filed: May 29, 2007
    Publication date: November 29, 2007
    Inventor: Takuji Kawamoto
  • Patent number: 7203798
    Abstract: A data memory cache unit is provided which is capable of heightening the speed of memory access. The cache unit 117 executes reading and writing of data in a 16-byte width line unit in a main memory unit 131, executes reading and writing of data in an MPU 113 in the unit of a four-byte width small area included in each line. When the MPU 113 executes a push instruction, if a cache miss takes place on a line which includes a small area that holds data which should be read out to the MPU 113 (NO at S1), then the cache unit 117 opens the line (S301). If a small area into which the data sent from the MPU 113 should be written is adjacent to a line boundary on the side where an address is larger or on the side where write-in is earlier executed (YES at S56), then the cache unit 117 does not execute a refill, and if this small area is not adjacent to the line boundary (NO at S56), then it executes a refill (S21).
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: April 10, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takuji Kawamoto
  • Patent number: 7134115
    Abstract: Disclosed is a breakpoint setting apparatus capable of setting a breakpoint without imposing any burden on a programmer. The breakpoint setting apparatus includes an edited-line list manager 115 for managing an address of an edited line in a source code, and a breakpoint setting/disabling sub unit 106 for setting a breakpoint at the address stored in the edited-line list manager 115. The breakpoint setting apparatus automatically sets a breakpoint on each line where the programmer makes an edit without any specific instruction from the programmer.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: November 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Kawai, Takuji Kawamoto
  • Publication number: 20060095897
    Abstract: The present invention relates a compiler program, a computer-readable storage medium storing such a compiler program, a compiling method and a compiling unit, and an object thereof is to automatically generate a reentrant object program. In order to accomplish this object, an address saving program generator 16a generates an address saving program for saving a data area address of a calling program module; an address setting program generator 16b generates an address setting program for setting a data area address of an other program module; a transferring program generator 16c generates a transferring program for the transfer from the calling program module to the other program module; an address resetting program generator 16d generates an address resetting program for reading and resetting the saved data area address; and an accessing program generator 16e generates an accessing program for accessing a data area for the other program module using a relative address from the set data area address.
    Type: Application
    Filed: December 26, 2003
    Publication date: May 4, 2006
    Inventors: Masaki Kawai, Takuji Kawamoto, Shusuke Haruna, Yutaka Fujihara
  • Patent number: 7024657
    Abstract: A program generation apparatus for generating light-weight class files for each terminal apparatus by linking class files. The program generation apparatus includes: a storage unit for prestoring the class files for each terminal apparatus, where each class defines (a) dependent variables unique to each terminal apparatus and (b) non-dependent variables common to all the terminal apparatuses, each variable is identified by a variable name, and each class file includes a variable name for each variable; an assignment unit for assigning an offset number to each variable defined in the class files so that the same offset numbers are assigned to non-dependent variables having the same variable names; and a generation unit for generating the light-weight class files for each terminal apparatus by replacing each variable name in each class file with an offset number assigned by the assignment unit.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: April 4, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Kawai, Takuji Kawamoto
  • Patent number: 6839726
    Abstract: A garbage collector 100 is composed of a generation heap creator 20, an inter-generation object relocator 80, and a generation heap deallocator 40. The generation heap creator 20 creates a generation heap at a start of execution of a method. The inter-generation object relocator 80 relocates, upon detecting a reference from an object in an older generation heap to another object in a younger generation heap, the referenced object in the younger generation heap to the older generation heap. The generation heap deallocator 40 deallocates, at a completion of a method, a generation heap corresponding to the method.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: January 4, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takuji Kawamoto
  • Publication number: 20040205738
    Abstract: An object of the present invention is to enable parts of a source program having a large number of executions, or parts having a high possibility of a large number of executions, to be extracted with good precision and compiled preferentially. In S11, a loop having a multi-nested structure or a single-nested structure is searched for in a main program. In S14, another program that is being called from within this loop is detected. In S15, a loop having a multi-nested structure or a single-nested structure is searched for in the callee program. In S17, the total number of nests in the loops detected so far is calculated as the loop depth. In other words, in S17 the degree of multiplicity in all of the loops forming a multi-nested structure over a plurality of programs having a calling relationship is calculated as the loop depth. In S20, the loop having the greatest loop depth is included in the parts to be compiled preferentially. In S21, only the parts determined as parts to be compiled are compiled.
    Type: Application
    Filed: April 7, 2004
    Publication date: October 14, 2004
    Inventors: Takehiro Yoshida, Takuji Kawamoto
  • Publication number: 20040205710
    Abstract: A program generation apparatus for generating light-weight class files for each terminal apparatus by linking class files. The program generation apparatus includes: a storage unit for prestoring the class files for each terminal apparatus, where each class defines (a) dependent variables unique to each terminal apparatus and (b) non-dependent variables common to all the terminal apparatuses, each variable is identified by a variable name, and each class file includes a variable name for each variable; an assignment unit for assigning an offset number to each variable defined in the class files so that the same offset numbers are assigned to non-dependent variables having the same variable names; and a generation unit for generating the light-weight class files for each terminal apparatus by replacing each variable name in each class file with an offset number assigned by the assignment unit.
    Type: Application
    Filed: February 20, 2001
    Publication date: October 14, 2004
    Inventors: Masaki Kawai, Takuji Kawamoto
  • Publication number: 20040199908
    Abstract: The speed of execution of linked programs is improved to the extent possible within the limit of the capacity of memory storing linked programs. As initial settings, all class libraries are set for linking (221). By this means, all class libraries are linked (223). Then, a judgment is made as to whether there is overflow of memory storing linked programs (225). If there is overflow, the maximum value of the number of applications using currently linked class libraries is set in variable N (231). Then, settings are modified such that class libraries used by N or more applications are not linked, and linking is again performed (223). If memory overflow does not occur, processing ends (228).
    Type: Application
    Filed: April 1, 2004
    Publication date: October 7, 2004
    Inventors: Takehiro Yoshida, Takuji Kawamoto, Masaki Kawai
  • Publication number: 20040186959
    Abstract: A data memory cache unit is provided which is capable of heightening the speed of memory access. The cache unit 117 executes reading and writing of data in a 16-byte width line unit in a main memory unit 131, executes reading and writing of data in an MPU 113 in the unit of a four-byte width small area included in each line. When the MPU 113 executes a push instruction, if a cache miss takes place on a line which includes a small area that holds data which should be read out to the MPU 113 (NO at S1), then the cache unit 117 opens the line (S301). If a small area into which the data sent from the MPU 113 should be written is adjacent to a line boundary on the side where an address is larger or on the side where write-in is earlier executed (YES at S56), then the cache unit 117 does not execute a refill, and if this small area is not adjacent to the line boundary (NO at S56), then it executes a refill (S21).
    Type: Application
    Filed: March 18, 2004
    Publication date: September 23, 2004
    Inventor: Takuji Kawamoto
  • Patent number: 6766336
    Abstract: A garbage collection apparatus that performs scavenging processing for specifying unused cell blocks from among a plurality of cell blocks, some of which can be reached from a specified root cell block via one of a set of trays. Each of the set of trays being specified by a second type address and holding a first type address, each of the plurality of cell blocks (a) being specified by a first type address and (b) including a plurality of cells that each hold one of a second type address and a numerical value, and compaction processing for relocating each of the specified unused cell blocks so as to form a continuous memory area, and updating each first type address that is held in a tray and corresponds to a cell block so as to specify a cell block following relocation.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: July 20, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventor: Takuji Kawamoto