Patents by Inventor Takuji Okeyui

Takuji Okeyui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130243605
    Abstract: The present invention provides a protection film for blades to be adhered to the blade surface of wind power generators, which has a substrate and a pressure-sensitive adhesive layer on one surface of the substrate.
    Type: Application
    Filed: February 28, 2013
    Publication date: September 19, 2013
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hiroyuki WATANABE, Hironori TAMAI, Takuji OKEYUI
  • Patent number: 8525351
    Abstract: A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: September 3, 2013
    Assignees: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Publication number: 20110291303
    Abstract: A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicants: Nitto Denko Corporation, Dai Nippon Printing Co., Ltd.
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Patent number: 8018044
    Abstract: A semiconductor device P includes a die pad 20, a semiconductor element 30 which is loaded on the die pad 20, and a sealing resin 40. A plurality of electrically conductive portions 10 each having a layered structure including a metal foil 1 comprising copper or a copper alloy, and electrically conductive portion plating layers 2 provided at both upper and lower ends of the metal foil 1 are arranged around the die pad 20. The die pad 20 has a lower die pad plating layer 2b, and the semiconductor element 30 is loaded on the die pad 20 comprising such a die pad plating layer 2b. Electrodes 30a provided on the semiconductor element 30 are electrically connected with top ends of the electrically conductive portions 10 via wires 3, respectively. The lower electrically conductive portion plating layers 2 of the electrically conductive portions 10 and the die pad plating layer 2b of the die pad 20 are exposed outside from the sealing resin 40 on their back faces.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: September 13, 2011
    Assignees: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Patent number: 7943427
    Abstract: A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheet 50 having a base layer 51 and an adhesive layer 52, and a plurality of independently provided electrically conductive portions 20. A semiconductor element having electrodes 11 formed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portions 20 and the electrodes 11 of the semiconductor element 10 are electrically connected by using wires 30. The semiconductor element 10, wires 30 and electrically conductive portions 20 are sealed by using a sealing resin 40. Each of the electrically conductive portions 20 has overhanging portions 20a, and a side face 60a of the electrically conductive portion 20 is roughened, thus enhancing the joining strength between each electrically conductive portion 20 and the sealing resin 40.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: May 17, 2011
    Assignees: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Publication number: 20110058950
    Abstract: The present invention provides a protection film for blades to be adhered to the blade surface of wind power generators, which has a substrate and a pressure-sensitive adhesive layer on one surface of the substrate.
    Type: Application
    Filed: August 5, 2010
    Publication date: March 10, 2011
    Applicant: Nitto Denko Corporation
    Inventors: Hiroyuki WATANABE, Hironori TAMAI, Takuji OKEYUI
  • Publication number: 20110031758
    Abstract: A reinforcing sheet for wind power generator blades includes a resin layer and a restricting layer laminated on the resin layer.
    Type: Application
    Filed: July 26, 2010
    Publication date: February 10, 2011
    Applicant: Nitto Denko Corporation
    Inventors: Yoshiaki Mitsuoka, Yasuhiko Kawaguchi, Takahiro Fujii, Takuji Okeyui
  • Publication number: 20110031759
    Abstract: A foam filling material for wind power generator blades is obtained by forming a foam filling composition containing a polymer and a foaming agent into a given shape so as to be positioned in an interior space of a wind power generator blade, and is capable of filling the interior space of the wind power generator blade by foaming.
    Type: Application
    Filed: July 26, 2010
    Publication date: February 10, 2011
    Applicant: Nitto Denko Corporation
    Inventors: Yoshiaki Mitsuoka, Takehiro Ui, Takuji Okeyui
  • Publication number: 20110031757
    Abstract: A vibration damping sheet for wind power generator blades includes a resin layer and a restricting layer laminated on the resin layer.
    Type: Application
    Filed: July 26, 2010
    Publication date: February 10, 2011
    Applicant: Nitto Denko Corporation
    Inventors: Yoshiaki Mitsuoka, Yasuhiko Kawaguchi, Katsuhiko Tachibana, Takahiro Fujii, Takuji Okeyui
  • Patent number: 7862954
    Abstract: The present invention relates to and provides a fuel cell in which sealing can be reliably made for each unit cell, thereby, enabling thinning, facilitating maintenance, and enabling miniaturization and weight reduction, and enabling free shape design. A fuel cell of the present invention is characterized by comprising a sheet-like solid polymer electrolyte 1 and a pair of electrode plates 2, 3 arranged on both sides of the solid polymer electrolyte 1, and further comprising a pair of metallic plates 4, 5 arranged on both sides of the electrode plates 2, 3, and provided flow path grooves 9, and inlets 4c, 5c and outlets communicating with the flow path grooves, wherein the peripheral edges of the metallic plates 4, 5 are mechanically sealed with an insulation material 6 interposed between the metallic plates.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: January 4, 2011
    Assignee: Aquafairy Corporation
    Inventors: Masaya Yano, Masakazu Sugimoto, Takuji Okeyui, Toshio Araki
  • Publication number: 20090017354
    Abstract: The present invention relates to and provides a fuel cell in which sealing can be reliably made for each unit cell, thereby, enabling thinning, facilitating maintenance, and enabling miniaturization and weight reduction, and enabling free shape design. A fuel cell of the present invention is characterized by comprising a sheet-like solid polymer electrolyte 1 and a pair of electrode plates 2, 3 arranged on both sides of the solid polymer electrolyte 1, and further comprising a pair of metallic plates 4, 5 arranged on both sides of the electrode plates 2, 3, and provided flow path grooves 9, and inlets 4c, 5c and outlets communicating with the flow path grooves, wherein the peripheral edges of the metallic plates 4, 5 are mechanically sealed with an insulation material 6 interposed between the metallic plates.
    Type: Application
    Filed: November 15, 2004
    Publication date: January 15, 2009
    Inventors: Masaya Yano, Masakazu Sugimoto, Takuji Okeyui, Toshio Araki
  • Publication number: 20080248338
    Abstract: A fuel cell having a unit cell formed of a sheet-like solid polymer electrolyte, its cathode-side electrode plate, an anode-side electrode plate, an oxygen-containing gas supply unit for supplying an oxygen-containing gas to the cathode-side electrode plate, and a hydrogen gas flow path unit for supplying a hydrogen gas to the anode-side electrode plate, regarding the unit cell which is to be a final stage of hydrogen gas supply, a flow path sectional area of the hydrogen gas flow path unit is not more than 1% of an area of the anode-side electrode plate and, at the same time, a discharge control mechanism for discharging a gas at 0.02 to 4% by volume relative to a hydrogen gas supplied to the unit cell is provided at an outlet of the hydrogen gas flow path unit.
    Type: Application
    Filed: September 29, 2005
    Publication date: October 9, 2008
    Inventors: Masaya Yano, Masakazu Sugimoto, Taiichi Sugita, Takuji Okeyui
  • Patent number: 7365441
    Abstract: A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: April 29, 2008
    Assignees: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, You Shimazaki, Masachika Masuda, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Publication number: 20080048311
    Abstract: A substrate B for use in production of a semiconductor device is used, which substrate includes an adhesive sheet 50 having a base layer 51 and an adhesive layer 52, and a plurality of independently provided electrically conductive portions 20. A semiconductor element having electrodes 11 formed thereon is firmly fixed onto the substrate B, and upper portions of the plurality of electrically conductive portions 20 and the electrodes 11 of the semiconductor element 10 are electrically connected by using wires 30. The semiconductor element 10, wires 30 and electrically conductive portions 20 are sealed by using a sealing resin 40. Each of the electrically conductive portions 20 has overhanging portions 20a, and a side face 60a of the electrically conductive portion 20 is roughened, thus enhancing the joining strength between each electrically conductive portion 20 and the sealing resin 40.
    Type: Application
    Filed: July 13, 2005
    Publication date: February 28, 2008
    Applicants: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Publication number: 20070241445
    Abstract: A semiconductor device P includes a die pad 20, a semiconductor element 30 which is loaded on the die pad 20, and a sealing resin 40. A plurality of electrically conductive portions 10 each having a layered structure including a metal foil 1 comprising copper or a copper alloy, and electrically conductive portion plating layers 2 provided at both upper and lower ends of the metal foil 1 are arranged around the die pad 20. The die pad 20 has a lower die pad plating layer 2b, and the semiconductor element 30 is loaded on the die pad 20 comprising such a die pad plating layer 2b. Electrodes 30a provided on the semiconductor element 30 are electrically connected with top ends of the electrically conductive portions 10 via wires 3, respectively. The lower electrically conductive portion plating layers 2 of the electrically conductive portions 10 and the die pad plating layer 2b of the die pad 20 are exposed outside from the sealing resin 40 on their back faces.
    Type: Application
    Filed: July 13, 2005
    Publication date: October 18, 2007
    Applicants: DAI NIPPON PRINTING CO., LTD., NITTO DENKO CORPORATION
    Inventors: Chikao Ikenaga, Kentarou Seki, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Patent number: 7262514
    Abstract: An epoxy resin composition for semiconductor encapsulation in producing surface mount lead-less thin semiconductor devices. The epoxy resin composition for surface mount lead-less semiconductor device encapsulation which device comprising an encapsulating resin layer and, encapsulated therein, a substrate, a semiconductor element mounted on the substrate, two or more conductive parts disposed around the semiconductor element, and wires which electrically connect electrodes of the semiconductor element to the conductive parts, wherein the bottom face of the substrate and the bottom face of each conductive part are exposed without being encapsulated in the encapsulating resin layer, and the epoxy resin composition used for forming the encapsulating resin layer has the following properties (?) and (?): (?) a melt viscosity of 2-10 Pa.s at 175° C.; and (?) a flexural strength of cured state of 130 MPa or higher at ordinary temperature.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: August 28, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Keisuke Yoshikawa, Kazuhito Hosokawa, Takuji Okeyui, Kazuhiro Ikemura
  • Patent number: 7235888
    Abstract: A series of semiconductor devices includes: (i) a plurality of semiconductor elements having electrodes; (ii) a plurality of electrically conductive parts formed around and electrically connected to each of the semiconductor elements; and (iii) a sealing resin in which the plurality of semiconductor elements and the plurality of electrically conductive parts are sealed and an electrode-free side of each semiconductor element and an unwired side of each electrically conductive part are formed on a single flat surface of a removable substrate.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 26, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Kazuhito Hosokawa, Takuji Okeyui, Hirofumi Fujii, Yasuhiko Yamamoto
  • Patent number: 7132755
    Abstract: An adhesive film for manufacturing a semiconductor device comprising a thermosetting adhesive layer and a heat-resistant backing layer, wherein the adhesive film is applied to a method for manufacturing a semiconductor device, comprising the steps of (a) embedding at least a part of a conductor in the adhesive film to form a conductor adhered thereto; (b) mounting a semiconductor chip on the conductor; (c) connecting the semiconductor chip to the conductor; (d) encapsulating the semiconductor chip with an encapsulation resin; and (e) removing the adhesive film therefrom. The adhesive film can be suitably used for manufacturing a semiconductor device having a so-called standoff wherein a part of a conductor is projecting from an encapsulation resin.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: November 7, 2006
    Assignee: Nitto Denko Corporation
    Inventors: Kazuhito Hosokawa, Takuji Okeyui, Kazuhiro Ikemura, Keisuke Yoshikawa
  • Publication number: 20060145363
    Abstract: A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.
    Type: Application
    Filed: February 28, 2006
    Publication date: July 6, 2006
    Applicants: DAI NIPPON PRINTING CO., LTD., NITTO DENKO CORPORATION
    Inventors: Chikao Ikenaga, You Shimazaki, Masachika Masuda, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura
  • Patent number: 7064011
    Abstract: A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50, and a semiconductor chip mounting step of bonding semiconductor chips to the adhesive sheet 50 with surfaces thereof not provided with any electrodes in contact with the adhesive sheet 50, and electrically connecting electrodes 11 formed on the semiconductor chips 10 and upper parts of the conductive pads 20 with wires 30. The semiconductor chips 10, the wires 30 and the conductive pads 20 are sealed in a sealing resin molding 40, and then the adhesive sheet 50 is separated from the sealing resin molding 40. Each of the conductive pads 20 has a reduced part 20b, and a jutting part 20a jutting out from the reduced part 20b. The conductive pads 20 having such construction can be firmly bonded to the sealing resin molding 40.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: June 20, 2006
    Assignees: Dai Nippon Printing Co., Ltd., Nitto Denko Corporation
    Inventors: Chikao Ikenaga, You Shimazaki, Masachika Masuda, Kazuhito Hosokawa, Takuji Okeyui, Keisuke Yoshikawa, Kazuhiro Ikemura