Patents by Inventor Takuma Hasegawa

Takuma Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11962605
    Abstract: A storage processing unit configured to store, in a storage unit, first data output by a device or any one of multiple devices in association with first context information related to the first data, and a determining unit configured to obtain second context information related to second data in a case where the second data is received from the device or any one of the multiple devices, and determine whether an analysis of the received second data is necessary based on the received second data and the obtained second context information and based on the first data and the first context information stored in the storage unit, are provided.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: April 16, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuma Koyama, Keita Hasegawa, Yasushi Okano, Masashi Tanaka
  • Publication number: 20240074694
    Abstract: A skin state is readily obtained. A method according to one embodiment of the present invention includes identifying a nasal feature of a user; and estimating a skin state of the user based on the nasal feature of the user.
    Type: Application
    Filed: February 15, 2022
    Publication date: March 7, 2024
    Inventors: Noriko HASEGAWA, Yuusuke HARA, Takuma HOSHINO
  • Patent number: 11343450
    Abstract: Image sensors having reduced dark current and white pixel are disclosed herein. In one embodiment, each pixel of the image sensor includes a photodiode (PD), a first floating diffusion (FD1) coupled to the photodiode through a transfer (TX) transistor, a second floating diffusion (FD2) coupled to the FD1 through a dual floating diffusion (DFD) transistor, and a lateral overflow integrating capacitor (LOFIC) coupled between the FD2 and a variable reference voltage (VCAP). A method for a correlated double sampling (CDS) readout includes: exposing a photodiode (PD) to light during an exposure period and increasing a capacitance of the LOFIC by setting the VCAP to a high voltage (H) level during an integration period of the exposure period.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: May 24, 2022
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Takuma Hasegawa
  • Patent number: 10332928
    Abstract: A pinned photodiode has a substrate having a first substrate side to which light is illuminated and a second substrate side opposite the first substrate side, a photoelectric conversion part including a first conductivity type semiconductor layer buried into the substrate and having a photoelectric conversion function for the received light and a charge accumulation function, a second conductivity type separation layer formed in the side portion of the first conductivity type semiconductor layer in the photoelectric conversion part, and one charge transfer gate part capable of transferring the charge accumulated in the photoelectric conversion part.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: June 25, 2019
    Assignee: Brillnics Japan Inc.
    Inventors: Kazuya Mori, Shunsuke Tanaka, Takuma Hasegawa
  • Publication number: 20180247969
    Abstract: A pinned photodiode has a substrate having a first substrate side to which light is illuminated and a second substrate side opposite the first substrate side, a photoelectric conversion part including a first conductivity type semiconductor layer buried into the substrate and having a photoelectric conversion function for the received light and a charge accumulation function, a second conductivity type separation layer formed in the side portion of the first conductivity type semiconductor layer in the photoelectric conversion part, and one charge transfer gate part capable of transferring the charge accumulated in the photoelectric conversion part.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Applicant: Brillnics Japan Inc.
    Inventors: Kazuya Mori, Shunsuke Tanaka, Takuma Hasegawa
  • Patent number: 9352542
    Abstract: A bonding method including an adhesive layer forming process in which a thermoplastic adhesive is applied to a substrate or a support plate and an adhesive layer is formed; a heating process in which the adhesive layer that is formed on the substrate or the support plate is heated; and a bonding process in which the substrate and the support plate are pressed against each other via the heated adhesive layer, thereby bonding the substrate and the support plate.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: May 31, 2016
    Assignee: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Yoshihiro Inao, Atsuo Kajima, Takuma Hasegawa, Koki Tamura, Shigeru Yokoi
  • Publication number: 20150013917
    Abstract: A bonding method including an adhesive layer forming process in which a thermoplastic adhesive is applied to a substrate or a support plate and an adhesive layer is formed; a heating process in which the adhesive layer that is formed on the substrate or the support plate is heated; and a bonding process in which the substrate and the support plate are pressed against each other via the heated adhesive layer, thereby bonding the substrate and the support plate.
    Type: Application
    Filed: January 11, 2013
    Publication date: January 15, 2015
    Inventors: Yoshihiro Inao, Atsuo Kajima, Takuma Hasegawa, Koki Tamura, Shigeru Yokoi
  • Patent number: 8336866
    Abstract: A stage is provided on which is mounted a substrate that has a concavo-convex portion such as a circuit formed on the underside thereof. A channel 3 through which a coolant such as water flows is formed in a stage 1. An annular flange portion 4 is formed on the top surface of the stage 1. The inner side of the flange portion 4 forms a concave portion 5. The top surface of the flange portion 4 is provided with a smooth finish in order to mount a peripheral section of the underside of a substrate W thereon. Holes through which are passed three positioning pins 6 and lift pins 7 are provided in the flange portion 4 at regular intervals in the circumferential direction.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: December 25, 2012
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Yasushi Fujii, Takuma Hasegawa
  • Publication number: 20090250855
    Abstract: A stage is provided on which is mounted a substrate that has a concavo-convex portion such as a circuit formed on the underside thereof. A channel 3 through which a coolant such as water flows is formed in a stage 1. An annular flange portion 4 is formed on the top surface of the stage 1. The inner side of the flange portion 4 forms a concave portion 5. The top surface of the flange portion 4 is provided with a smooth finish in order to mount a peripheral section of the underside of a substrate W thereon. Holes through which are passed three positioning pins 6 and lift pins 7 are provided in the flange portion 4 at regular intervals in the circumferential direction.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 8, 2009
    Applicant: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Yasushi Fujii, Takuma Hasegawa