Patents by Inventor Takumi Ogino
Takumi Ogino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11855116Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.Type: GrantFiled: November 5, 2021Date of Patent: December 26, 2023Assignee: Canon Kabushiki KaishaInventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
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Publication number: 20230008401Abstract: A semiconductor device includes a first semiconductor component including a first semiconductor substrate and a first wiring structure, and a second semiconductor component including a second semiconductor substrate and a second wiring structure. A first surface of the first semiconductor component and a second surface of the second semiconductor component are bonded together. Assuming that regions having circumferences respectively corresponding to shapes obtained by vertically projecting the first surface, the second surface, the first wiring structure, and the second wiring structure on a virtual plane are first to fourth regions, respectively, an area of the first region is smaller than an area of the second region, the entire circumference of the first region is included in the second region, an area of the fourth region is smaller than an area of the third region, and the entire circumference of the fourth region is included in the third region.Type: ApplicationFiled: July 6, 2022Publication date: January 12, 2023Inventors: Takuya Hara, Takumi Ogino
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Patent number: 11502162Abstract: A semiconductor apparatus includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, and a wiring structure arranged between them. The second semiconductor layer is provided with p-type MIS transistor. A crystal structure of the first semiconductor layer has a first crystal orientation and a second crystal orientation in direction along a principal surface of the first semiconductor layer. A Young's modulus of the first semiconductor layer in a direction along the first crystal orientation is higher than that in a direction along the second crystal orientation. An angle formed by the first crystal orientation and a direction in which a source and a drain of the p-type MIS transistor are arranged is more than 30 degrees and less than 60 degrees, and an angle formed by the second crystal orientation and that direction is 0 degrees or more and 30 degrees or less.Type: GrantFiled: December 3, 2020Date of Patent: November 15, 2022Assignee: Canon Kabushiki KaishaInventors: Takumi Ogino, Katsunori Hirota, Hiroaki Kobayashi
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Publication number: 20220231175Abstract: A photoelectric conversion apparatus comprises a semiconductor layer including a plurality of photoelectric conversion portions and having a first surface and a second surface that is the surface opposite to the first surface, a wiring structure disposed on the second surface side of the semiconductor layer, and a metal compound film disposed on the first surface side of the semiconductor layer. The metal compound film contains hydrogen and carbon. The concentration of the hydrogen in the interface on the semiconductor layer side of the metal compound film is 1×1021 atoms/cm3 or more and 1×1022 atoms/cm3 or less. The concentration of the carbon in the interface on the semiconductor layer side of the metal compound film is 5×1020 atoms/cm3 or more and 1×1022 atoms/cm3 or less.Type: ApplicationFiled: January 13, 2022Publication date: July 21, 2022Inventors: Yoshiei Tanaka, Takumi Ogino, Tsutomu Tange
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Patent number: 11276723Abstract: A semiconductor device comprising: a substrate; a semiconductor layer; and a wiring structure section between the substrate and the semiconductor layer, the wiring structure section including a plurality of stacked wiring layers and a plurality of stacked insulating films, the wiring structure section including an electrode, wherein an opening for connecting a member to the electrode is formed in the semiconductor layer and the wiring structure section; the semiconductor layer has an isolation region in which an insulating film is embedded and which surrounds the opening; the wiring structure section has a ring which is formed of the plurality of wiring layers and surround the opening; and a distance between the opening and the ring closest to the opening is larger than a distance between the opening and the isolation region closest to the opening.Type: GrantFiled: October 10, 2019Date of Patent: March 15, 2022Assignee: Canon Kabushiki KaishaInventors: Takumi Ogino, Hideaki Ishino, Akihiro Shimizu, Katsunori Hirota, Tsutomu Tange
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Publication number: 20220059597Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.Type: ApplicationFiled: November 5, 2021Publication date: February 24, 2022Inventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
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Patent number: 11195870Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.Type: GrantFiled: February 27, 2020Date of Patent: December 7, 2021Assignee: Canon Kabushiki KaishaInventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
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Patent number: 11114484Abstract: A photoelectric conversion apparatus includes, a semiconductor substrate having a photoelectric conversion unit performing photoelectric conversion on entering light and accumulating first electric charges, a first transistor electrically connected to the photoelectric conversion unit and having a first gate on a second surface, and a second transistor having a second gate shorter than the first gate on the second surface, a first fixed charge film continuously provided directly or with an insulating film in between in an area overlapping the photoelectric conversion unit on a first surface and the second transistor, the first fixed charge film having fixed charges of the first polarity, and a second fixed charge film provided directly or with an insulating film in between in an area overlapping the second transistor and the first fixed charge film, the second fixed charge film having fixed charges of a second polarity.Type: GrantFiled: May 29, 2019Date of Patent: September 7, 2021Assignee: CANON KABUSHIKI KAISHAInventors: Takumi Ogino, Hideaki Ishino
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Patent number: 11101312Abstract: A semiconductor apparatus comprising: a first semiconductor component including a first semiconductor layer and a first insulation film; and a second semiconductor component including a second semiconductor layer and a second insulation film, wherein the first semiconductor component and the second semiconductor component are bonded to each other by each of a plurality of first electric conductor portions provided in the first insulation film and each of a plurality of second electric conductor portions provided in the second insulation film, each of the plurality of first electric conductor portions is constituted by one pad surrounded by the first insulation film and N vias bonded to the one pad so as to be positioned between the one pad and the first semiconductor layer, and a volume VTR of the one pad and a total volume VTH of the N vias satisfy VTR/VTH?N.Type: GrantFiled: January 22, 2020Date of Patent: August 24, 2021Assignee: Canon Kabushiki KaishaInventors: Takumi Ogino, Hiroaki Kobayashi, Tsutomu Tange, Akihiro Shimizu
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Publication number: 20210175324Abstract: A semiconductor apparatus includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, and a wiring structure arranged between them. The second semiconductor layer is provided with p-type MIS transistor. A crystal structure of the first semiconductor layer has a first crystal orientation and a second crystal orientation in direction along a principal surface of the first semiconductor layer. A Young's modulus of the first semiconductor layer in a direction along the first crystal orientation is higher than that in a direction along the second crystal orientation. An angle formed by the first crystal orientation and a direction in which a source and a drain of the p-type MIS transistor are arranged is more than 30 degrees and less than 60 degrees, and an angle formed by the second crystal orientation and that direction is 0 degrees or more and 30 degrees or less.Type: ApplicationFiled: December 3, 2020Publication date: June 10, 2021Inventors: Takumi Ogino, Katsunori Hirota, Hiroaki Kobayashi
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Patent number: 10998370Abstract: A semiconductor device comprising a first circuit component and a second circuit component, the first circuit component having a first wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a first semiconductor substrate, the second circuit component having a second wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a second semiconductor substrate, the first and second wiring structures being bonded to each other, their bonding planes being composed of oxygen atoms and carbon atoms and/or nitrogen atoms bonded to silicon atoms, and, numbers of their atoms satisfying a predetermined equation.Type: GrantFiled: September 3, 2019Date of Patent: May 4, 2021Assignee: CANON KABUSHIKI KAISHAInventors: Hiroshi Ikakura, Takumi Ogino
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Patent number: 10991741Abstract: A silicon compound film that is any one of a silicon oxide film, a silicon nitride film, and a silicon carbide film, and a metal compound film lying between the silicon compound film and a semiconductor layer are arranged above a main face. The silicon compound film and the metal compound film extend into a first trench, and the metal compound film extends into a second trench. When a distance from the bottom of the second trench to the silicon compound film is expressed as “Hb”, and a distance from the main face to the silicon compound film is expressed as “Hd”, the respective distances satisfy the condition “Hd<Hb”.Type: GrantFiled: August 30, 2019Date of Patent: April 27, 2021Assignee: Canon Kabushiki KaishaInventors: Yoshiei Tanaka, Katsunori Hirota, Yusuke Onuki, Tsutomu Tange, Takumi Ogino
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Publication number: 20200286943Abstract: A first conductive portion includes a first pad surrounded by a first insulator film in a plane perpendicular to a first direction, and a first via connected to the first pad so that the first via is positioned between the first pad and a first semiconductor layer in the first direction. A second conductive portion includes a second pad surrounded by a second insulator film in a plane perpendicular to the first direction, and a second via connected to the second pad so that the second via is positioned between the second pad and a second semiconductor layer in the first direction. The first and the second conductive portions are different in dimension.Type: ApplicationFiled: February 27, 2020Publication date: September 10, 2020Inventors: Tsutomu Tange, Takumi Ogino, Hiroaki Kobayashi
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Publication number: 20200251518Abstract: A semiconductor apparatus comprising: a first semiconductor component including a first semiconductor layer and a first insulation film; and a second semiconductor component including a second semiconductor layer and a second insulation film, wherein the first semiconductor component and the second semiconductor component are bonded to each other by each of a plurality of first electric conductor portions provided in the first insulation film and each of a plurality of second electric conductor portions provided in the second insulation film, each of the plurality of first electric conductor portions is constituted by one pad surrounded by the first insulation film and N vias bonded to the one pad so as to be positioned between the one pad and the first semiconductor layer, and a volume VTR of the one pad and a total volume VTH of the N vias satisfy VTR/VTH?N.Type: ApplicationFiled: January 22, 2020Publication date: August 6, 2020Inventors: Takumi Ogino, Hiroaki Kobayashi, Tsutomu Tange, Akihiro Shimizu
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Publication number: 20200127032Abstract: A semiconductor device comprising: a substrate; a semiconductor layer; and a wiring structure section between the substrate and the semiconductor layer, the wiring structure section including a plurality of stacked wiring layers and a plurality of stacked insulating films, the wiring structure section including an electrode, wherein an opening for connecting a member to the electrode is formed in the semiconductor layer and the wiring structure section; the semiconductor layer has an isolation region in which an insulating film is embedded and which surrounds the opening; the wiring structure section has a ring which is formed of the plurality of wiring layers and surround the opening; and a distance between the opening and the ring closest to the opening is larger than a distance between the opening and the isolation region closest to the opening.Type: ApplicationFiled: October 10, 2019Publication date: April 23, 2020Inventors: Takumi Ogino, Hideaki Ishino, Akihiro Shimizu, Katsunori Hirota, Tsutomu Tange
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Patent number: 10622397Abstract: A semiconductor layer includes an opening, and in a joint surface between structures, a portion between a semiconductor layer and an opening in a direction in which the semiconductor layers are stacked together includes a plurality of conductor portions and an insulator portion located between the plurality of conductor portions in a direction orthogonal to the direction.Type: GrantFiled: November 16, 2018Date of Patent: April 14, 2020Assignee: CANON KABUSHIKI KAISHAInventors: Hideaki Ishino, Takumi Ogino
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Publication number: 20200091218Abstract: A semiconductor device comprising a first circuit component and a second circuit component, the first circuit component having a first wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a first semiconductor substrate, the second circuit component having a second wiring structure formed by stacking one or more wiring layers and one or more insulating layers on a second semiconductor substrate, the first and second wiring structures being bonded to each other, their bonding planes being composed of oxygen atoms and carbon atoms and/or nitrogen atoms bonded to silicon atoms, and, numbers of their atoms satisfying a predetermined equation.Type: ApplicationFiled: September 3, 2019Publication date: March 19, 2020Inventors: Hiroshi Ikakura, Takumi Ogino
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Publication number: 20200083263Abstract: A silicon compound film that is any one of a silicon oxide film, a silicon nitride film, and a silicon carbide film, and a metal compound film lying between the silicon compound film and a semiconductor layer are arranged above a main face. The silicon compound film and the metal compound film extend into a first trench, and the metal compound film extends into a second trench. When a distance from the bottom of the second trench to the silicon compound film is expressed as “Hb”, and a distance from the main face to the silicon compound film is expressed as “Hd”, the respective distances satisfy the condition “Hd<Hb”.Type: ApplicationFiled: August 30, 2019Publication date: March 12, 2020Inventors: Yoshiei Tanaka, Katsunori Hirota, Yusuke Onuki, Tsutomu Tange, Takumi Ogino
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Publication number: 20190371836Abstract: A photoelectric conversion apparatus includes, a semiconductor substrate having a photoelectric conversion unit performing photoelectric conversion on entering light and accumulating first electric charges, a first transistor electrically connected to the photoelectric conversion unit and having a first gate on a second surface, and a second transistor having a second gate shorter than the first gate on the second surface, a first fixed charge film continuously provided directly or with an insulating film in between in an area overlapping the photoelectric conversion unit on a first surface and the second transistor, the first fixed charge film having fixed charges of the first polarity, and a second fixed charge film provided directly or with an insulating film in between in an area overlapping the second transistor and the first fixed charge film, the second fixed charge film having fixed charges of a second polarity.Type: ApplicationFiled: May 29, 2019Publication date: December 5, 2019Inventors: Takumi Ogino, Hideaki Ishino
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Publication number: 20190165027Abstract: A semiconductor layer includes an opening, and in a joint surface between structures, a portion between a semiconductor layer and an opening in a direction in which the semiconductor layers are stacked together includes a plurality of conductor portions and an insulator portion located between the plurality of conductor portions in a direction orthogonal to the direction.Type: ApplicationFiled: November 16, 2018Publication date: May 30, 2019Inventors: Hideaki Ishino, Takumi Ogino