Patents by Inventor Takumichi Sutani

Takumichi Sutani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10732512
    Abstract: An image processor, a method for generating a pattern using self-organizing lithographic techniques, and a computer program are provided to achieve image processing suitable for addressing a sample generated by patterning using Directed Self-Assembly (DSA), and the processor, method, and computer program are characterized in that a template for addressing is prepared on the basis of guide pattern data used for patterning by DSA. The above configuration makes it possible to provide an addressing pattern suitable for visual field positioning in measuring or inspecting a pattern formed through the patterning process using DSA.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: August 4, 2020
    Assignee: Hitachi High-Tech Corporation
    Inventors: Takumichi Sutani, Miki Isawa, Shunsuke Koshihara, Akiyuki Sugiyama
  • Publication number: 20180181009
    Abstract: An image processor, a method for generating a pattern using self-organizing lithographic techniques, and a computer program are provided to achieve image processing suitable for addressing a sample generated by patterning using Directed Self-Assembly (DSA), and the processor, method, and computer program are characterized in that a template for addressing is prepared on the basis of guide pattern data used for patterning by DSA. The above configuration makes it possible to provide an addressing pattern suitable for visual field positioning in measuring or inspecting a pattern formed through the patterning process using DSA.
    Type: Application
    Filed: February 23, 2018
    Publication date: June 28, 2018
    Inventors: Takumichi SUTANI, Miki ISAWA, Shunsuke KOSHIHARA, Akiyuki SUGIYAMA
  • Publication number: 20150277237
    Abstract: An image processor, a method for generating a pattern using self-organizing lithographic techniques, and a computer program are provided to achieve image processing suitable for addressing a sample generated by patterning using Directed Self-Assembly (DSA), and the processor, method, and computer program are characterized in that a template for addressing is prepared on the basis of guide pattern data used for patterning by DSA. The above configuration makes it possible to provide an addressing pattern suitable for visual field positioning in measuring or inspecting a pattern formed through the patterning process using DSA.
    Type: Application
    Filed: November 14, 2013
    Publication date: October 1, 2015
    Inventors: Takumichi Sutani, Miki Isawa, Shunsuke Koshihara, Akiyuki Sugiyama
  • Patent number: 8788981
    Abstract: In a method and apparatus for quantitatively evaluating two-dimensional patterns, a reference coordinate system is set in order to convert pattern edge information (one-dimensional data) acquired by measurement using an existing critical dimension machine into coordinate data. Thus, a pattern is converted into coordinate information. Next, a function formula is determined from this coordinate information by approximate calculation and a pattern is represented by the mathematical expression y=f(x). Integrating y=f(x) in the reference coordinate used when calculating the coordinate data gives the area of the pattern, whereby it is possible to convert the coordinate data to two-dimensional data.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: July 22, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Mihoko Kijima, Kyoungmo Yang, Shigeki Sukegawa, Takumichi Sutani
  • Patent number: 8577124
    Abstract: A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: November 5, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yasutaka Toyoda, Akiyuki Sugiyama, Ryoichi Matsuoka, Takumichi Sutani, Hidemitsu Naya
  • Patent number: 8507856
    Abstract: A pattern measuring method and device are provided which set a reference position for a measuring point to be measured by a scanning electron microscope and the like, based on position information of a reference pattern on an image acquired from the scanning electron microscope and based on a positional relation, detected by using design data, between the measuring point and the reference pattern formed at a position isolated from the measuring point.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: August 13, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takumichi Sutani, Ryoichi Matsuoka, Hidetoshi Morokuma, Hitoshi Komuro, Akiyuki Sugiyama
  • Patent number: 8338804
    Abstract: One of principal objects of the present invention is to provide a sample dimension measuring method for detecting the position of an edge of a two-dimensional pattern constantly with the same accuracy irrespective of the direction of the edge and a sample dimension measuring apparatus. According to this invention, to accomplish the above object, it is proposed to correct the change of a signal waveform of secondary electrons which depends on the direction of scanning of an electron beam relative to the direction of a pattern edge of an inspection objective pattern. It is proposed that when changing the scanning direction of the electron beam in compliance with the direction of a pattern to be measured, errors in the scanning direction and the scanning position are corrected. In this configuration, a sufficient accuracy of edge detection can be obtained irrespective of the scanning direction of the electron beam.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: December 25, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hidetoshi Morokuma, Akiyuki Sugiyama, Ryoichi Matsuoka, Takumichi Sutani, Yasutaka Toyoda
  • Patent number: 8331651
    Abstract: An apparatus and method for inspecting a defect of a circuit pattern formed on a semiconductor wafer includes a defect classifier have a comparison shape forming section for forming a plurality of comparison shapes corresponding to an SEM image of an inspection region by deforming the shape of the circuit pattern in accordance with a plurality of shape deformation rules using design data corresponding to the circuit pattern within the inspection region and a shape similar to the SEM image of the inspection region out of the plurality of comparison shapes formed and selected as the comparison shape, and a shape comparing and classifying section for classifying the SEM image using information of the comparison shape selected in the comparison shape forming section and the inspection shape of the circuit pattern of the SEM image of the inspection region.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: December 11, 2012
    Assignee: Hitachi High-Technologies Corporatiopn
    Inventors: Tomofumi Nishiura, Atsushi Miyamoto, Chie Shishido, Takumichi Sutani
  • Publication number: 20120211653
    Abstract: A pattern measuring method and device are provided which set a reference position for a measuring point to be measured by a scanning electron microscope and the like, based on position information of a reference pattern on an image acquired from the scanning electron microscope and based on a positional relation, detected by using design data, between the measuring point and the reference pattern formed at a position isolated from the measuring point.
    Type: Application
    Filed: April 26, 2012
    Publication date: August 23, 2012
    Inventors: Takumichi SUTANI, Ryoichi Matsuoka, Hidetoshi Morokuma, Hitoshi Komuro, Akiyuki Sugiyama
  • Patent number: 8244042
    Abstract: A pattern matching method which is capable of selecting a suitable measurement object pattern, even on a sample containing a periodic structure, and a computer program for making a computer execute the pattern matching. In a pattern matching method which executes matching between the design data-based first image of an object sample, and a second image, whether or not a periodic structure is included in a region to execute the matching is determined, so as to select a pattern, based on distance between an original point which is set in said image, and the pattern configuring said periodic structure, in the case where the periodic structure is included in said region, and to select a pattern based on coincidence of the pattern in said image, in the case where the periodic structure is not included in said region, and a computer program product.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: August 14, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Akiyuki Sugiyama, Hiroyuki Shindo, Hitoshi Komuro, Takumichi Sutani, Hidetoshi Morokuma
  • Patent number: 8199191
    Abstract: There is provided an electron microscope which is capable of making a significant contribution to accomplishment of efficiency in investigating causes for pattern abnormalities found out. The electron microscope including an I/O for capturing image data on a microscopic image acquired by another electron microscope, a computation processing unit for generating a display signal based on the image data on the microscopic image acquired by another electron microscope and captured via the I/O and image data on a microscopic image acquired by the electron microscope itself, in order that the microscopic image acquired by another electron microscope and the microscopic image acquired by the electron microscope itself are displayed at the same scale and under the same display condition, and a display unit for displaying both of the microscopic images based on the display signal from the computation processing unit.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: June 12, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hidetoshi Sato, Takumichi Sutani, Yutaka Hojo
  • Patent number: 8173962
    Abstract: An evaluation method and apparatus is provided for evaluating a displacement between patterns of a pattern image by using design data representative of a plurality of patterns superimposed ideally. A first distance is measured for an upper layer pattern between a line segment of the design data and an edge of the charged particle radiation image, a second distance is measured for a lower layer pattern between a line segment of the design data and an edge of the charged particle radiation image; and an superimposition displacement is detected between the upper layer pattern and lower layer pattern in accordance with the first distance and second distance.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: May 8, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takumichi Sutani, Ryoichi Matsuoka, Hidetoshi Morokuma, Akiyuki Sugiyama, Hiroyuki Shindo
  • Publication number: 20120099781
    Abstract: A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.
    Type: Application
    Filed: January 5, 2012
    Publication date: April 26, 2012
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Yasutaka TOYODA, Akiyuki SUGIYAMA, Ryoichi MATSUOKA, Takumichi SUTANI, Hidemitsu NAYA
  • Patent number: 8131059
    Abstract: In an apparatus for photographing an image of a product to judge whether or not a defect is present, a manufacturing desirable image is formed from data acquired when the product was designed, which could be obtained if no defect was present when the product was photographed, an inspection portion where a defect may occur is selected from the formed manufacturing desirable image, a defect pattern is superimposed on the selected inspection portion so as to form a template equipped with the defect pattern. The image of the product is photographed, a template matching operation is carried out as a template having the defect pattern, and judgement is made whether or not a defect is present based upon a matched evaluation value. As a result, the judgement for judging whether or not the defect is present can be directly carried out based upon the evaluation value.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: March 6, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Junichi Taguchi, Takumichi Sutani
  • Patent number: 8115169
    Abstract: A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: February 14, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yasutaka Toyoda, Akiyuki Sugiyama, Ryoichi Matsuoka, Takumichi Sutani, Hidemitsu Naya
  • Publication number: 20120002861
    Abstract: An apparatus and method for inspecting a defect of a circuit pattern formed on a semiconductor wafer includes a defect classifier have a comparison shape forming section for forming a plurality of comparison shapes corresponding to an SEM image of an inspection region by deforming the shape of the circuit pattern in accordance with a plurality of shape deformation rules using design data corresponding to the circuit pattern within the inspection region and a shape similar to the SEM image of the inspection region out of the plurality of comparison shapes formed and selected as the comparison shape, and a shape comparing and classifying section for classifying the SEM image using information of the comparison shape selected in the comparison shape forming section and the inspection shape of the circuit pattern of the SEM image of the inspection region.
    Type: Application
    Filed: September 13, 2011
    Publication date: January 5, 2012
    Inventors: Tomofumi Nishiura, Atsushi Miyamoto, Chie Shishido, Takumichi Sutani
  • Patent number: 8045789
    Abstract: In the inspection apparatus for a defect of a semiconductor and the method using it for automatically detecting the defect on a semiconductor wafer and presuming the defect occurrence factor using the circuit design data, a plurality of shapes are formed from the circuit design data by deforming the design data with respect to shape deformation items stipulated for respective defect occurrence factor for comparison with the inspection object circuit pattern. The defect is detected by comparison of the group of shapes formed and the actual pattern. Further, the occurrence factors of these defects are presumed, and the defects are classified according to respective factor.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: October 25, 2011
    Assignee: Hitachi High-Technologies Corporaiton
    Inventors: Tomofumi Nishiura, Atsushi Miyamoto, Chie Shishido, Takumichi Sutani
  • Patent number: 8019161
    Abstract: A workpiece size measurement method suitable for length measurement of multilayered circuit elements with increased complexities is disclosed. This method employs a technique for changing measurement conditions in a way pursuant to either an image of workpiece or the situation of a target semiconductor circuit element to be measured when measuring pattern sizes on the workpiece image using design data of the semiconductor circuit element. With such an arrangement, adequate measurement conditions are selectable in accordance with the state of workpiece image and/or the state of a circuit element formed on the workpiece, thereby making it possible to improve the measurement efficiency. A workpiece size measurement apparatus using the technique is also disclosed.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: September 13, 2011
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hidetoshi Morokuma, Takumichi Sutani, Ryoichi Matsuoka, Hitoshi Komuro, Akiyuki Sugiyama
  • Patent number: RE45204
    Abstract: In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: October 21, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Atsushi Miyamoto, Wataru Nagatomo, Ryoichi Matsuoka, Hidetoshi Morokuma, Takumichi Sutani
  • Patent number: RE45224
    Abstract: In an imaging recipe creating apparatus that uses a scanning electron microscope to create an imaging recipe for SEM observation of a semiconductor pattern, in order that the imaging recipe for measuring the wiring width and other various dimension values of the pattern from an observation image and thus evaluating the shape of the pattern is automatically generated within a minimum time by the analysis using the CAD image obtained by conversion from CAD data, an CAD image creation unit that creates the CAD image by converting the CAD data into an image format includes an image-quantizing width determining section, a brightness information providing section, and a pattern shape deformation processing section; the imaging recipe being created using the CAD image created by the CAD image creation unit.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 28, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Atsushi Miyamoto, Wataru Nagatomo, Ryoichi Matsuoka, Hidetoshi Morokuma, Takumichi Sutani