Patents by Inventor Takuo Hiratani

Takuo Hiratani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220247155
    Abstract: A semiconductor optical device includes a substrate containing silicon, and a semiconductor element bonded to the substrate, the semiconductor element being formed of a compound semiconductor and having an optical gain. The substrate includes a waveguide and a first region connected to the waveguide in an extension direction of the waveguide. The first region includes a plurality of recesses and a plurality of protrusions. Each of the plurality of recesses is recessed in a thickness direction of the substrate compared to a surface of the substrate to which the semiconductor element is bonded. Each of the plurality of protrusions protrudes in the thickness direction of the substrate from bottom surfaces of the plurality of recesses. The plurality of recesses and the plurality of protrusions are alternately disposed in a direction intersecting with the extension direction of the waveguide. The semiconductor element is bonded to the first region.
    Type: Application
    Filed: January 26, 2022
    Publication date: August 4, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takuo HIRATANI, Naoki FUJIWARA, Takehiko KIKUCHI
  • Patent number: 11393945
    Abstract: A method for manufacturing an optical semiconductor device, includes the steps of: forming a plurality of compound semiconductor layers including a sacrificial layer, an absorption layer, and a core layer; forming a first mesa from the plurality of compound semiconductor layers; forming an embedding layer that is a semiconductor layer having the first mesa embedded therein; after the step of forming the embedding layer, etching the sacrificial layer to form a chip including the plurality of compound semiconductor layers and the embedding layer; bonding the chip to a substrate comprising silicon and having a waveguide; and etching a portion of the first mesa of the chip bonded to the substrate to form a second mesa adjacent to the first mesa. The second mesa includes the core layer and is optically coupled to the waveguide of the substrate.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 19, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Naoko Konishi, Takuo Hiratani
  • Publication number: 20220206226
    Abstract: A semiconductor optical device includes a substrate containing silicon and including terraces, a waveguide, and a diffraction grating in different regions in plan view; and a semiconductor device formed of a III-V compound semiconductor and having an optical gain, the semiconductor device being joined to the diffraction grating and the terraces and being in contact with an upper surface of the substrate. The waveguide is optically coupled to the diffraction grating in a direction in which the waveguide extends. The terraces are located on both sides of the waveguide and the diffraction grating in a direction crossing the direction in which the waveguide extends. The substrate has a groove between each of the terraces and the waveguide. The diffraction grating is continuously connected to the terraces in the direction crossing the direction in which the waveguide extends.
    Type: Application
    Filed: November 11, 2021
    Publication date: June 30, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Takuo HIRATANI
  • Publication number: 20220158412
    Abstract: A semiconductor optical device includes a substrate including a waveguide made of silicon and a semiconductor layer joined to the substrate so as to overlap the waveguide and including a diffraction grating formed of a first semiconductor layer and a second semiconductor layer having different refractive indices. The waveguide includes a bent portion and a plurality of straight portions that are connected to each other by the bent portion and that extend straight. The first semiconductor layer and the second semiconductor layer are each made of a compound semiconductor. The second semiconductor layer is embedded in the first semiconductor layer and includes a plurality of portions arranged in a direction in which the plurality of straight portions extend. The diffraction grating is positioned above the plurality of straight portions.
    Type: Application
    Filed: October 4, 2021
    Publication date: May 19, 2022
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takuo HIRATANI, Hideki YAGI, Naoki FUJIWARA
  • Publication number: 20210249840
    Abstract: A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 12, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki FUJIWARA, Hideki YAGI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
  • Publication number: 20210143609
    Abstract: A semiconductor optical device includes a substrate containing silicon and having a waveguide, a first semiconductor element including a core layer formed of III-V group compound semiconductors and being bonded to the substrate, and a second semiconductor element including a diffraction grating and being bonded to the substrate, wherein the diffraction grating has a first semiconductor layer and a second semiconductor layer burying the first semiconductor layer, the first semiconductor layer and the second semiconductor layer are formed of III-V group compound semiconductors, and the diffraction grating reflects light propagating through the waveguide.
    Type: Application
    Filed: October 21, 2020
    Publication date: May 13, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takuo HIRATANI
  • Publication number: 20210126428
    Abstract: A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 29, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoki FUJIWARA, Hideki YAGI, Hajime SHOJI, Takuo HIRATANI, Takehiko KIKUCHI, Toshiyuki NITTA
  • Publication number: 20210126424
    Abstract: A semiconductor laser diode includes a semiconductor substrate, a laser portion that is provided on the semiconductor substrate and has an active layer, and an optical modulation portion that is provided on the semiconductor substrate and has a light absorption layer configured to absorb laser light from the laser portion. In the semiconductor laser diode, the light absorption layer includes a first light absorption layer and a second light absorption layer. The active layer, the first light absorption layer, and the second light absorption layer are arranged in this order in a light guiding direction. The first light absorption layer has a first wavelength obtained by photoluminescence measurement, the second light absorption layer has a second wavelength obtained by photoluminescence measurement, and the second wavelength is longer than the first wavelength.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 29, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuki ITO, Takuo HIRATANI
  • Patent number: 10969543
    Abstract: A semiconductor integrated optical device includes a waveguide mesa having a first multilayer including a first core layer, a second multilayer including a second core layer, and a butt joint interface between the first core layer and the second core layer; a support having first to third regions; and a buried semiconductor region provided on the support. The first multilayer has a first mesa width on the first region. The second multilayer has a second mesa width on the second region. On the third region, the second multilayer has a waveguide portion having a third mesa width smaller than the first and the second mesa widths. The second core layer has a waveguide core thickness on the second region. In the waveguide portion, the second core layer has a core portion having a thickness different from the waveguide core thickness at a position away from the butt-joint interface.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: April 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takuo Hiratani
  • Publication number: 20200326476
    Abstract: A semiconductor integrated optical device includes a waveguide mesa having a first multilayer including a first core layer, a second multilayer including a second core layer, and a butt joint interface between the first core layer and the second core layer; a support having first to third regions; and a buried semiconductor region provided on the support. The first multilayer has a first mesa width on the first region. The second multilayer has a second mesa width on the second region. On the third region, the second multilayer has a waveguide portion having a third mesa width smaller than the first and the second mesa widths. The second core layer has a waveguide core thickness on the second region. In the waveguide portion, the second core layer has a core portion having a thickness different from the waveguide core thickness at a position away from the butt-joint interface.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 15, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takuo HIRATANI
  • Publication number: 20200303903
    Abstract: A method for manufacturing an optical semiconductor device, includes the steps of: forming a plurality of compound semiconductor layers including a sacrificial layer, an absorption layer, and a core layer; forming a first mesa from the plurality of compound semiconductor layers; forming an embedding layer that is a semiconductor layer having the first mesa embedded therein; after the step of forming the embedding layer, etching the sacrificial layer to form a chip including the plurality of compound semiconductor layers and the embedding layer; bonding the chip to a substrate comprising silicon and having a waveguide; and etching a portion of the first mesa of the chip bonded to the substrate to form a second mesa adjacent to the first mesa. The second mesa includes the core layer and is optically coupled to the waveguide of the substrate.
    Type: Application
    Filed: February 26, 2020
    Publication date: September 24, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Naoko KONISHI, Takuo HIRATANI
  • Patent number: 10725241
    Abstract: A spot-size converter includes: a support body that includes a main surface including a first to a fifth areas; a mesa structure that includes a first part on the first area and includes a second part on the second to the fourth areas; and an embedding structure that includes a first region and a second region in which a first and a second side-surfaces of the second part of the mesa structure are respectively embedded. The second part of the mesa structure includes a portion that has a width gradually decreasing in a direction from the third area toward the fifth area. The first region of the embedding structure extends along the first side-surface and terminates at one of the third and the fourth areas. The second region of the embedding structure extends along the second side-surface of the second part and is disposed on the fifth area.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: July 28, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Takuo Hiratani, Masataka Watanabe
  • Publication number: 20190391332
    Abstract: A spot-size converter includes: a support body that includes a main surface including a first to a fifth areas; a mesa structure that includes a first part on the first area and includes a second part on the second to the fourth areas; and an embedding structure that includes a first region and a second region in which a first and a second side-surfaces of the second part of the mesa structure are respectively embedded. The second part of the mesa structure includes a portion that has a width gradually decreasing in a direction from the third area toward the fifth area. The first region of the embedding structure extends along the first side-surface and terminates at one of the third and the fourth areas. The second region of the embedding structure extends along the second side-surface of the second part and is disposed on the fifth area.
    Type: Application
    Filed: June 19, 2019
    Publication date: December 26, 2019
    Applicant: SUMITOMO ELECTRONIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Takuo Hiratani, Masataka Watanabe