Abstract: A semiconductor module includes: a semiconductor element having a first main electrode and a second main electrode; a first conductive member and a second conductive member connected to the first main electrode and the second main electrode, respectively, and placed to sandwich the semiconductor element; and a main terminal including a first main terminal continuous from the first conductive member and a second main terminal continuous from the second conductive member. The main terminal has a facing portion, a non-facing portion, a first connection portion, and a second connection portion. In a width direction, a formation position of the second connection portion overlaps with a formation position of the first connection portion.

Abstract: The semiconductor device includes a semiconductor element having first and second main electrodes, first and second substrates connected to the first and second main electrodes, respectively, first and second main terminals connected to the first and second main electrodes via the first and second substrates, respectively, and a bonding member. The bonding member is interposed between the first and second main electrodes and between the first and second substrates, respectively. At least one of the first and second main terminals includes a plurality of terminals. The first and second main terminals are alternately arranged in one direction orthogonal to the thickness direction of the semiconductor element. The first and second main terminals are directly bonded to the first and second substrates without the bonding member.

Abstract: A semiconductor device includes a semiconductor element configured to form an upper-lower arm circuit of a power conversion device. The semiconductor element includes a control electrode, a high-potential electrode and a low-potential electrode. A parasitic capacitance between the control electrode and the high-potential electrode changes according to a potential difference between the high-potential electrode and the low-potential electrode. A value of the parasitic capacitance at a time when the potential difference is equal to 80 percent of a breakdown voltage of the semiconductor element is defined as a first capacitance value. An arbitrary value of the parasitic capacitance at a time when the potential difference is in an inclusive range of 20 percent to 40 percent of the breakdown voltage is defined as a second capacitance value. The first capacitance value is larger than the second capacitance value.

Abstract: A semiconductor device configures one arm of an upper-lower arm circuit, and includes: a semiconductor element that includes a first main electrode and a second main electrode, wherein a main current between the first main electrode and the second main electrode; and multiple main terminals that include a first main terminal connected to the first main electrode and a second main terminal connected to the second main electrode. The first main terminal and the second main terminal are placed adjacent to each other; A lateral surface of the first main terminal and a lateral surface of the second main terminal face each other in one direction orthogonal to a thickness direction of the semiconductor element.

Abstract: In a semiconductor module, two switching elements are connected in parallel to each other. Each of the switching elements includes a first main electrode formed on one surface side, and a second main electrode and a gate electrode formed on a rear surface side opposite to the one surface side. A first conductor plate is coupled with two first main terminals at first coupling portions and is electrically connected with the first main electrodes. A second conductor plate is coupled with one second main terminal at a second coupling portion and is electrically connected with the second main electrodes. The second coupling portion is disposed between the switching elements in an alignment direction of the switching elements, and the first coupling portions are provided on both sides of the second coupling portion in the alignment direction.

Abstract: The semiconductor device includes a semiconductor element having first and second main electrodes, first and second substrates connected to the first and second main electrodes, respectively, first and second main terminals connected to the first and second main electrodes via the first and second substrates, respectively, and a bonding member. The bonding member is interposed between the first and second main electrodes and between the first and second substrates, respectively. At least one of the first and second main terminals includes a plurality of terminals. The first and second main terminals are alternately arranged in one direction orthogonal to the thickness direction of the semiconductor element. The first and second main terminals are directly bonded to the first and second substrates without the bonding member.

Abstract: A semiconductor module includes: a semiconductor element having a first main electrode and a second main electrode; a first conductive member and a second conductive member connected to the first main electrode and the second main electrode, respectively, and placed to sandwich the semiconductor element; and a main terminal including a first main terminal continuous from the first conductive member and a second main terminal continuous from the second conductive member. The main terminal has a facing portion, a non-facing portion, a first connection portion, and a second connection portion. In a width direction, a formation position of the second connection portion overlaps with a formation position of the first connection portion.

Abstract: A semiconductor device includes at least one semiconductor element, a sealing resin body, a first main terminal, and a second main terminal. The at least one semiconductor element has, as main electrodes, a first main electrode and a second main electrode. A main current flows between the first main electrode and the second main electrode. The sealing resin body seals the at least one semiconductor element. The first main terminal is electrically connected to the first main electrode inside the sealing resin body. The second main terminal is electrically connected to the second main electrode inside the sealing resin body. Each of the first main terminal and the second main terminal extends to an outside of the sealing resin body for connecting to an external member.

Abstract: A semiconductor device configures one arm of an upper-lower arm circuit, and includes: a semiconductor element that includes a first main electrode and a second main electrode, wherein a main current between the first main electrode and the second main electrode; and multiple main terminals that include a first main terminal connected to the first main electrode and a second main terminal connected to the second main electrode. The first main terminal and the second main terminal are placed adjacent to each other; A lateral surface of the first main terminal and a lateral surface of the second main terminal face each other in one direction orthogonal to a thickness direction of the semiconductor element.

Abstract: A semiconductor device includes a first semiconductor chip formed with an IGBT, a second semiconductor chip formed with a MOSFET, a first metal member electrically connected to a collector electrode and a drain electrode, and a second metal member electrically connected to an emitter electrode and a source electrode. The IGBT and the MOSFET connected in parallel to each other are turned on in the order of the IGBT and the MOSFET, and turned off in the order of the MOSFET and the IGBT. The second metal member has a main body portion on which the first and second semiconductor chips are mounted, and a joint portion as a terminal portion connected to the main body portion. In a plan view, a shortest distance between the joint portion and the first semiconductor chip is shorter than a shortest distance between the joint portion and the second semiconductor chip.

Abstract: In a semiconductor module, two switching elements are connected in parallel to each other. Each of the switching elements includes a first main electrode formed on one surface side, and a second main electrode and a gate electrode formed on a rear surface side opposite to the one surface side. A first conductor plate is coupled with two first main terminals at first coupling portions and is electrically connected with the first main electrodes. A second conductor plate is coupled with one second main terminal at a second coupling portion and is electrically connected with the second main electrodes. The second coupling portion is disposed between the switching elements in an alignment direction of the switching elements, and the first coupling portions are provided on both sides of the second coupling portion in the alignment direction.

Abstract: A semiconductor device includes a first semiconductor chip formed with an IGBT, a second semiconductor chip formed with a MOSFET, a first metal member electrically connected to a collector electrode and a drain electrode, and a second metal member electrically connected to an emitter electrode and a source electrode. The IGBT and the MOSFET connected in parallel to each other are turned on in the order of the IGBT and the MOSFET, and turned off in the order of the MOSFET and the IGBT. The second metal member has a main body portion on which the first and second semiconductor chips are mounted, and a joint portion as a terminal portion connected to the main body portion. In a plan view, a shortest distance between the joint portion and the first semiconductor chip is shorter than a shortest distance between the joint portion and the second semiconductor chip.

Abstract: A power transistor driving apparatus includes: a field-effect type transistor; an insulated gate type bipolar transistor, which is connected to the field-effect type transistor in parallel; a first driving circuit generating a first gate voltage to turn on the insulated gate type bipolar transistor, the first gate voltage applied to a gate of the insulated gate type bipolar transistor; a second driving circuit adjusting a second gate voltage to turn on or off the field-effect type transistor, the second gate voltage applied to a gate of the field-effect type transistor; a detection circuit detecting whether the insulated gate type bipolar transistor is turned on when the first driving circuit generates the first gate voltage. The second driving circuit generates the second gate voltage to turn on the field-effect type transistor when the detection circuit detects that the insulated gate type bipolar transistor is turned on.

Abstract: A power transistor driving apparatus includes: a field-effect type transistor; an insulated gate type bipolar transistor, which is connected to the field-effect type transistor in parallel; a first driving circuit generating a first gate voltage to turn on the insulated gate type bipolar transistor, the first gate voltage applied to a gate of the insulated gate type bipolar transistor; a second driving circuit adjusting a second gate voltage to turn on or off the field-effect type transistor, the second gate voltage applied to a gate of the field-effect type transistor; a detection circuit detecting whether the insulated gate type bipolar transistor is turned on when the first driving circuit generates the first gate voltage. The second driving circuit generates the second gate voltage to turn on the field-effect type transistor when the detection circuit detects that the insulated gate type bipolar transistor is turned on.

Abstract: A drive device includes an off-side circuit controlling a gate current of a power switching element to perform an off operation. The off-side circuit includes: a main MOS transistor; a sense MOS transistor defining a drain current of the main MOS transistor; and a sense current control circuit controlling a drain current of the sense MOS transistor to be constant. The sense current control circuit includes: a reference power supply; a reference resistor; and an operational amplifier generating an output at the gate of the sense MOS transistor so that a potential between the reference resistor and the sense MOS transistor approaches the reference potential. The sense current control circuit flows a current, determined by a resistance value of the reference resistor and the reference potential, as the drain current of the sense MOS transistor.

Abstract: A drive device includes: an on-side circuit turning on a power switching element; an off-side circuit turning off the power switching element; and a protection circuit controlling a gate current of the power switching element. The protection circuit includes: a constant-current circuit that defines a constant current for drawing a gate charge of the power switching element; a protection switch that controls electrical connection between the constant-current circuit and the gate of the power switching element; and a collector current detector. The collector current detector turns off the on-side circuit to disconnect the power switching element from the main power supply, and turns on the protection switch after a predetermined time has elapsed from when the current value of the collector current of the power switching element exceeds a first threshold.

Abstract: A drive device includes: an on-side circuit turning on a power switching element; an off-side circuit turning off the power switching element; and a protection circuit controlling a gate current of the power switching element. The protection circuit includes: a constant-current circuit that defines a constant current for drawing a gate charge of the power switching element; a protection switch that controls electrical connection between the constant-current circuit and the gate of the power switching element; and a collector current detector. The collector current detector turns off the on-side circuit to disconnect the power switching element from the main power supply, and turns on the protection switch after a predetermined time has elapsed from when the current value of the collector current of the power switching element exceeds a first threshold.

Abstract: A drive device includes an off-side circuit controlling a gate current of a power switching element to perform an off operation. The off-side circuit includes: a main MOS transistor; a sense MOS transistor defining a drain current of the main MOS transistor; and a sense current control circuit controlling a drain current of the sense MOS transistor to be constant. The sense current control circuit includes: a reference power supply; a reference resistor; and an operational amplifier generating an output at the gate of the sense MOS transistor so that a potential between the reference resistor and the sense MOS transistor approaches the reference potential. The sense current control circuit flows a current, determined by a resistance value of the reference resistor and the reference potential, as the drain current of the sense MOS transistor.

Abstract: A first annular isolation trench is formed in a periphery of an element region, and a second annular isolation trench is formed around the first annular isolation trench with a predetermined distance provided from the first annular isolation trench, and a semiconductor layer between the first annular isolation trench and the second annular isolation trench is separated into a plurality of portions by a plurality of linear isolation trenches formed in the semiconductor layer between the first annular isolation trench and the second annular isolation trench, and the semiconductor layer (source-side isolation region) which opposes a p-type channel layer end portion and is located between the first annular isolation trench and the second annular isolation trench is separated from other semiconductor layers (drain-side isolation regions) by the linear isolation trenches.

Abstract: A first annular isolation trench is formed in a periphery of an element region, and a second annular isolation trench is formed around the first annular isolation trench with a predetermined distance provided from the first annular isolation trench, and a semiconductor layer between the first annular isolation trench and the second annular isolation trench is separated into a plurality of portions by a plurality of linear isolation trenches formed in the semiconductor layer between the first annular isolation trench and the second annular isolation trench, and the semiconductor layer (source-side isolation region) which opposes a p-type channel layer end portion and is located between the first annular isolation trench and the second annular isolation trench is separated from other semiconductor layers (drain-side isolation regions) by the linear isolation trenches.