Abstract: A semiconductor device for driving a semiconductor switch, including a first transistor configured to extract gate charges of the semiconductor switch with a first extraction force, a comparator configured to compare gate voltage of the semiconductor switch with a threshold voltage to thereby output a first decision signal, an AND circuit configured to perform an AND operation on a gate voltage of the first transistor and the first decision signal to thereby output a second decision signal, a delay circuit configured to delay the second decision signal by a predetermined time and to output the delayed signal as a second control signal, and a second transistor configured to be turned-on, in response to the second control signal, the predetermined time after the first transistor is turned-on, to thereby extract the gate charges of the semiconductor switch with a second extraction force larger than the first extraction force.

Abstract: A semiconductor element driving device including: plural detection units configured to detect information necessary for protection operation for a semiconductor element included in a power conversion device; a protection signal generation unit configured to generate a protection signal having a pulse width different according to each of the plural detection units when the plural detection units detect the information necessary for the protection operation; a protection state monitoring unit configured to generate a protection state signal while any of the plural detection units is detecting the information necessary for the protection operation; and a signal output unit configured to output an alarm signal, the alarm signal changing from a first level to a second level when the protection signal and the protection state signal are input, and changing to an intermediate level between the first level and the second level when the input of the protection signal is stopped.

Abstract: A semiconductor device for driving a semiconductor switch, including a first transistor configured to extract gate charges of the semiconductor switch with a first extraction force, a comparator configured to compare gate voltage of the semiconductor switch with a threshold voltage to thereby output a first decision signal, an AND circuit configured to perform an AND operation on a gate voltage of the first transistor and the first decision signal to thereby output a second decision signal, a delay circuit configured to delay the second decision signal by a predetermined time and to output the delayed signal as a second control signal, and a second transistor configured to be turned-on, in response to the second control signal, the predetermined time after the first transistor is turned-on, to thereby extract the gate charges of the semiconductor switch with a second extraction force larger than the first extraction force.