Patents by Inventor Takuya Haga

Takuya Haga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data transfer device which executes DMA transfer, semiconductor integrated circuit device and data transfer method
    Patent number: 7506114
    Abstract: A data transfer device which controls data transfer between a first memory device and a second memory device, includes a first transfer arbiter circuit and a second transfer arbiter circuit. The first transfer arbiter circuit outputs, in response to a transfer instruction for transfer of data from the first memory device to the second memory device, first transfer instructions to transfer data in a first transfer unit in an order of addresses. The second transfer arbiter circuit outputs, in response to the first transfer instruction, second transfer instructions to transfer the data of the first transfer unit in a second transfer unit smaller than the first transfer unit. The second transfer arbiter circuit outputs the second transfer instruction in an order of accessible addresses in the first and second memory devices.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 17, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takuya Haga, Tetsuhiko Azuma
  • Data transfer device which executes DMA transfer, semiconductor integrated circuit device and data transfer method
    Publication number: 20060265534
    Abstract: A data transfer device which controls data transfer between a first memory device and a second memory device, includes a first transfer arbiter circuit and a second transfer arbiter circuit. The first transfer arbiter circuit outputs, in response to a transfer instruction for transfer of data from the first memory device to the second memory device, first transfer instructions to transfer data in a first transfer unit in an order of addresses. The second transfer arbiter circuit outputs, in response to the first transfer instruction, second transfer instructions to transfer the data of the first transfer unit in a second transfer unit smaller than the first transfer unit. The second transfer arbiter circuit outputs the second transfer instruction in an order of accessible addresses in the first and second memory devices.
    Type: Application
    Filed: May 4, 2006
    Publication date: November 23, 2006
    Inventors: Takuya Haga, Tetsuhiko Azuma