Abstract: A wiring board includes: a wiring-board body including a first surface and a second surface opposite to the first surface, and including at least one insulator layer; pads formed at at least one of an internal layer boundary plane and the first surface and the second surface defining a first plane; and via conductors connected to corresponding ones of the pads, and arranged in parallel to extend in a thickness direction of the wiring-board body. Each of first and second ones of the pads adjacent to each other in planar view at the first plane is connected to corresponding ones of the via conductors. The via conductors corresponding to the first pad are arranged differently from the via conductors corresponding to the second pad, in planar view.

Abstract: A wiring board includes: a wiring-board body including a first surface and a second surface opposite to the first surface, and including at least one insulator layer; pads formed at at least one of an internal layer boundary plane and the first surface and the second surface defining a first plane; and via conductors connected to corresponding ones of the pads, and arranged in parallel to extend in a thickness direction of the wiring-board body. Each of first and second ones of the pads adjacent to each other in planar view at the first plane is connected to corresponding ones of the via conductors. The via conductors corresponding to the first pad are arranged differently from the via conductors corresponding to the second pad, in planar view.

Abstract: Embodiments of the presently-disclosed subject matter include a first laminated structure in which at least one conductor layer and at least one resin insulating layer are alternately formed is formed on a supporting substrate, and a core substrate is formed so as to come into contact with the conductor layer which is the uppermost layer of the first laminated structure. Then, laser light is emitted to the core substrate to form a through hole and a metal layer is formed in the through hole. Then, a second laminated structure including at least one conductor layer and at least one resin insulating layer is formed on the core substrate. At that time, the thickness of the conductor layer which is the uppermost layer of the first laminated structure is greater than that of the other conductor layers.

Abstract: A wiring substrate includes a first substrate to be connected to a second substrate. Electrodes are disposed on a substrate main surface of the first substrate, and columnar terminals are bonded onto the electrodes via solder portions. Each columnar terminal includes a columnar terminal body, and a projecting piece that projects from an outer peripheral surface of the columnar terminal body at a center portion, in a height direction, of the outer peripheral surface of the columnar terminal body. Each columnar terminal has a shape vertically symmetrical about the projecting piece.

Abstract: A circuit board according to the present invention includes a first substrate that is or is to be connected to a second substrate. Electrodes are arranged on a principal surface of the first substrate, and pillar-shaped terminals are bonded to the respective electrodes with solder portions provided therebetween. Each pillar-shaped terminal includes a pillar-shaped terminal body and a solder blocking layer that covers a central region of an outer peripheral surface of the pillar-shaped terminal body in a height direction, and the pillar-shaped terminal has a shape that is vertically symmetrical about the solder blocking layer. The area of a region of the outer peripheral surface of the pillar-shaped terminal body that is not covered with the solder blocking layer is larger than the area of the region of the outer peripheral surface that is covered with the solder blocking layer.

Abstract: A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.

Abstract: A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface.

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract: A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

Abstract: A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.

Abstract: A multilayer wiring substrate of the present invention has a laminated structure composed of conductor layers and resin insulating layers stacked alternately. A plurality of surface connection terminals to which terminals of a chip component are to be surface-connected are formed on a main face of the laminated structure. A plurality of via conductors connected to the plurality of surface connection terminals are formed in the resin insulating layers. Each of the plurality of surface connection terminals has a structure in which a copper layer, a nickel layer, and a gold layer are stacked in this sequence. The gold layer is larger in diameter than at least the copper layer. The gold layer has an overhanging portion which extends radially outward from a circumference of the copper layer.

Abstract: A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface. Embodiments make it possible to feed and hold a sufficient amount of solder paste on the upper surface of conductive pads, thereby minimizing or eliminating the occurrence of defective connections to a semiconductor element and damage to the solder layer caused by an insufficient thickness of the solder layer.

Abstract: A wiring board has a wiring board main body, a solder resist and solder bumps. The solder resist is formed on a top surface of the wiring board main body, and includes first openings, and second openings that have a diameter larger than that of the first openings. The solder bumps are disposed in the first openings and in the second openings. In addition, top portions of the solder bumps disposed in the first openings have a flat face, while top portions of the solder bumps disposed in the second openings have a non-flat face.

Abstract: A multilayer wiring substrate has a multilayer wiring laminate portion in which a plurality of resin insulation layers made primarily of the same resin insulation material, and a plurality of conductive layers are laminated alternately. A plurality of first-main-surface-side connection terminals are disposed on one side of the laminate structure where a first main surface thereof is present, and a plurality of second-main-surface-side connection terminals being disposed on an other side of the laminate structure where a second main surface thereof is present. The plurality of conductive layers are formed in the plurality of resin insulation layers and interconnected by means of via conductors whose diameters increase toward the first main surface or the second main surface. The plurality of first-main-surface-side connection terminals comprising at least two types of terminals for connection of different articles-to-be-connected.

Abstract: In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

Abstract: A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

Abstract: A multilayer wiring substrate of the present invention has a laminated structure composed of conductor layers and resin insulating layers stacked alternately. A plurality of surface connection terminals to which terminals of a chip component are to be surface-connected are formed on a main face of the laminated structure. A plurality of via conductors connected to the plurality of surface connection terminals are formed in the resin insulating layers. Each of the plurality of surface connection terminals has a structure in which a copper layer, a nickel layer, and a gold layer are stacked in this sequence. The gold layer is larger in diameter than at least the copper layer. The gold layer has an overhanging portion which extends radially outward from a circumference of the copper layer.

Abstract: A multilayer wiring substrate is manufactured through a recess forming step, a gold-diffusion-prevention-layer forming step, a terminal forming step, resin-insulating-layer forming step, a conductor forming step, and a metal-layer removing step. In the recess forming step, a copper foil layer is half-etched so as to form recesses. In the gold-diffusion-prevention-layer forming step, a gold diffusion prevention layer is formed in each recess. In the terminal forming step, a gold layer, a nickel layer, and a copper layer are stacked in sequence on the gold diffusion prevention layer to thereby form a surface connection terminal. In the resin-insulating-layer forming step, a resin insulating layer is formed, and, in the conductor forming step, via conductors and conductor layers are formed. In the metal-layer removing step, the copper foil layer and the gold diffusion prevention layer are removed so that the gold layer projects from the main face of the laminated structure.

Abstract: A wiring board includes an insulating layer having a plurality of through holes formed therein, a base substrate layer positioned below the insulating layer, and a plurality of electrodes disposed on the base substrate layer, each electrode having an exposed surface exposed from a respective through hole, each exposed surfaces being coated with a flux. A plurality of solder balls are disposed on the fluxes in the through holes, respectively. An apparatus for mounting the solder balls on the plurality of electrodes includes: a solder ball removing unit configured to remove a first plurality of solder balls located other than in the through holes; and a solder ball pressing unit configured to press a second plurality of solder balls individually disposed in the through holes towards respective electrodes and into respective flux.