Patents by Inventor Takuya Hatanaka

Takuya Hatanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7474152
    Abstract: An operational amplifier circuit has a differential input circuit including a first transistor, which receives a first input signal and generates a first voltage, and a second transistor, which receives a second input signal and generates a second voltage. An output stage circuit includes a third transistor responsive to the second voltage, a fourth transistor connected to the third transistor, a fifth transistor responsive to the first voltage, and a sixth transistor connected to the fifth transistor. The output stage circuit generates an output signal of the amplifier circuit at a first node between the fifth and sixth transistors. A seventh transistor connected between the third and fourth transistors controls the potential at a second node between the third and seventh transistors to be the same as the potential of the first input signal in correspondence with the first input signal.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: January 6, 2009
    Assignee: Fujitsu Limited
    Inventor: Takuya Hatanaka
  • Publication number: 20070273443
    Abstract: An operational amplifier circuit has a differential input circuit including a first transistor, which receives a first input signal and generates a first voltage, and a second transistor, which receives a second input signal and generates a second voltage. An output stage circuit includes a third transistor responsive to the second voltage, a fourth transistor connected to the third transistor, a fifth transistor responsive to the first voltage, and a sixth transistor connected to the fifth transistor. The output stage circuit generates an output signal of the amplifier circuit at a first node between the fifth and sixth transistors. A seventh transistor connected between the third and fourth transistors controls the potential at a second node between the third and seventh transistors to be the same as the potential of the first input signal in correspondence with the first input signal.
    Type: Application
    Filed: March 8, 2007
    Publication date: November 29, 2007
    Inventor: Takuya Hatanaka