Patents by Inventor Takuya Hirohashi

Takuya Hirohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8637866
    Abstract: A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: January 28, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshiyuki Isa, Yasuhiro Jinbo, Sachiaki Tezuka, Koji Dairiki, Hidekazu Miyairi, Shunpei Yamazaki, Takuya Hirohashi
  • Publication number: 20130316243
    Abstract: A power storage device including a negative electrode having high cycle performance in which little deterioration due to charge and discharge occurs is manufactured. A power storage device including a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode is manufactured, in which the negative electrode includes a negative electrode current collector and a negative electrode active material layer, and the negative electrode active material layer includes an uneven silicon layer formed over the negative electrode current collector, a silicon oxide layer or a mixed layer which includes silicon oxide and a silicate compound and is in contact with the silicon layer, and graphene in contact with the silicon oxide layer or the mixed layer including the silicon oxide and the silicate compound.
    Type: Application
    Filed: August 28, 2012
    Publication date: November 28, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toshihiko TAKEUCHI, Minoru TAKAHASHI, Takeshi OSADA, Teppei OGUNI, Takuya HIROHASHI, Hiroyuki TOMISU
  • Publication number: 20130299827
    Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 14, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20130299826
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro SAKATA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Patent number: 8530285
    Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: September 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takuya Hirohashi, Masahiro Takahashi, Takashi Shimazu
  • Patent number: 8492758
    Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
  • Patent number: 8492757
    Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20130052537
    Abstract: A power storage device including a negative electrode having high cycle performance in which little deterioration due to charge and discharge occurs is manufactured. A power storage device including a positive electrode, a negative electrode, and an electrolyte provided between the positive electrode and the negative electrode is manufactured, in which the negative electrode includes a negative electrode current collector and a negative electrode active material layer, and the negative electrode active material layer includes an uneven silicon layer formed over the negative electrode current collector, a silicon oxide layer or a mixed layer which includes silicon oxide and a silicate compound and is in contact with the silicon layer, and graphene in contact with the silicon oxide layer or the mixed layer including the silicon oxide and the silicate compound.
    Type: Application
    Filed: August 28, 2012
    Publication date: February 28, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toshihiko TAKEUCHI, Minoru Takahashi, Takeshi Osada, Teppei Oguni, Takuya Hirohashi
  • Publication number: 20120328953
    Abstract: Graphene which is permeable to lithium ions and can be used for electric appliances is provided. A carbocyclic ring including nine or more ring members is provided in graphene. The maximum potential energy of the carbocyclic ring including nine or more ring members to a lithium ion is substantially 0 eV. Therefore, the carbocyclic ring including nine or more ring members can function as a hole through which lithium ions pass. When a surface of an electrode or an active material is coated with such graphene, reaction of the electrode or the active material with an electrolyte can be suppressed without interference with the movement of lithium ions.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takuya HIROHASHI, Shunsuke Adachi
  • Publication number: 20120328951
    Abstract: An object is to provide graphene which has high conductivity and is permeable to ions of lithium or the like. Another object is to provide, with use of the graphene, a power storage device with excellent charging and discharging characteristics. Graphene having a hole inside a ring-like structure formed by carbon and nitrogen has conductivity and is permeable to ions of lithium or the like. The nitrogen concentration in graphene is preferably higher than or equal to 0.4 at. % and lower than or equal to 40 at. %. With use of such graphene, ions of lithium or the like can be preferably made to pass; thus, a power storage device with excellent charging and discharging characteristics can be provided.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya HIROHASHI, Teppei OGUNI
  • Patent number: 8329506
    Abstract: It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0).
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Junichiro Sakata, Takuya Hirohashi, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga
  • Patent number: 8329520
    Abstract: An island-shaped single crystal semiconductor layer whose top surface has a plane within ±10° from a {211} plane is formed on an insulating surface; a non-single-crystal semiconductor layer is formed in contact with the top surface and a side surface of the single crystal semiconductor layer and on the insulating surface; the non-single-crystal semiconductor layer is irradiated with laser light to melt the non-single-crystal semiconductor layer, and to crystallize the non-single-crystal semiconductor layer formed on the insulating surface with use of the single crystal semiconductor layer as a seed crystal, so that a crystalline semiconductor layer is formed. A semiconductor device having an n-channel transistor and a p-channel transistor formed with use of the crystalline semiconductor layer is provided.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: December 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Masahiro Takahashi, Takuya Hirohashi
  • Publication number: 20120305913
    Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
    Type: Application
    Filed: August 14, 2012
    Publication date: December 6, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Takuya HIROHASHI, Masahiro TAKAHASHI, Takashi SHIMAZU
  • Patent number: 8319218
    Abstract: An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Akiharu Miyanaga, Masahiro Takahashi, Takuya Hirohashi, Takashi Shimazu
  • Patent number: 8309961
    Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: November 13, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
  • Publication number: 20120256179
    Abstract: To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Patent number: 8168973
    Abstract: The thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode, an amorphous semiconductor layer over the gate insulating layer, a semiconductor layer including an impurity element imparting one conductivity type over the amorphous semiconductor layer. The amorphous semiconductor layer comprises an NH radical. Defects of the amorphous semiconductor layer are reduced by cross-linking dangling bonds with the NH radical in the amorphous semiconductor layer.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: May 1, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Dairiki, Hidekazu Miyairi, Akiharu Miyanaga, Takuya Hirohashi
  • Publication number: 20120088151
    Abstract: A positive-electrode active material with improved electrical conductivity, and a power storage device using the material are provided. A positive-electrode active material with large capacity, and a power storage device using the material are provided. A core including lithium metal oxide is used as a core of a main material of the positive-electrode active material, and one to ten pieces of graphene is used as a covering layer for the core. A hole is provided for graphene, whereby transmission of a lithium ion is facilitated, resulting in improvement of use efficiency of current.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 12, 2012
    Inventors: Shunpei Yamazaki, Tamae Moriwaka, Takuya Hirohashi, Kuniharu Nomoto, Takuya Miwa
  • Patent number: 8124972
    Abstract: The thin film transistor includes a gate insulating layer covering a gate electrode, over a substrate having an insulating surface; a semiconductor layer forming a channel formation region, in which a plurality of crystal regions is included in an amorphous structure; an impurity semiconductor layer imparting one conductivity type which forms a source region and a drain region; and a buffer layer formed from an amorphous semiconductor, which is located between the semiconductor layer and the impurity semiconductor layer. The thin film transistor includes the crystal region which includes minute crystal grains and inverted conical or inverted pyramidal grain each of which grows approximately radially from a position away from an interface between the gate insulating layer and the semiconductor layer toward a direction in which the semiconductor layer is deposited in a region which does not reach the impurity semiconductor layer.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: February 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Hidekazu Miyairi, Toshiyuki Isa, Akiharu Miyanaga, Takuya Hirohashi, Shunpei Yamazaki, Takeyoshi Watabe
  • Publication number: 20120001179
    Abstract: It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×1019 atoms/cm3 or lower and the source electrode and the drain electrode include one or more of tungsten, platinum, and molybdenum.
    Type: Application
    Filed: June 22, 2011
    Publication date: January 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Takuya HIROHASHI, Katsuaki TOCHIBAYASHI, Yasutaka NAKAZAWA, Masatoshi YOKOYAMA